{"title":"基于2v, 3.2 ps抖动,1ghz时钟合成器和温度补偿可调振荡器的CMOS DLL","authors":"David J. Foley, M. Flynn","doi":"10.1109/CICC.2000.852688","DOIUrl":null,"url":null,"abstract":"This paper describes a low voltage, low jitter clock synthesizer and a temperature compensated tunable oscillator. Both of these circuits employ a self-correcting Delay Locked Loop (DLL). The DLL provides multiple clock phases that are combined to produce the desired output frequency for the synthesizer and provides temperature compensated biasing for the tunable oscillator. With a 2 V supply the measured RMS jitter for the 1 GHz synthesizer output was 3.2 ps. With a 3.3 V supply RMS jitter of 3.1 ps was measured for a 1.6 GHz output. The tunable oscillator has a 1.8% frequency variation over an ambient temperature range from 0 to 85/spl deg/C. The circuits were fabricated on a generic 0.5 /spl mu/m digital CMOS process.","PeriodicalId":20702,"journal":{"name":"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)","volume":"15 1","pages":"371-374"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"141","resultStr":"{\"title\":\"CMOS DLL based 2 V, 3.2 ps jitter, 1 GHz clock synthesizer and temperature compensated tunable oscillator\",\"authors\":\"David J. Foley, M. Flynn\",\"doi\":\"10.1109/CICC.2000.852688\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a low voltage, low jitter clock synthesizer and a temperature compensated tunable oscillator. Both of these circuits employ a self-correcting Delay Locked Loop (DLL). The DLL provides multiple clock phases that are combined to produce the desired output frequency for the synthesizer and provides temperature compensated biasing for the tunable oscillator. With a 2 V supply the measured RMS jitter for the 1 GHz synthesizer output was 3.2 ps. With a 3.3 V supply RMS jitter of 3.1 ps was measured for a 1.6 GHz output. The tunable oscillator has a 1.8% frequency variation over an ambient temperature range from 0 to 85/spl deg/C. The circuits were fabricated on a generic 0.5 /spl mu/m digital CMOS process.\",\"PeriodicalId\":20702,\"journal\":{\"name\":\"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)\",\"volume\":\"15 1\",\"pages\":\"371-374\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-05-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"141\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2000.852688\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2000.852688","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
CMOS DLL based 2 V, 3.2 ps jitter, 1 GHz clock synthesizer and temperature compensated tunable oscillator
This paper describes a low voltage, low jitter clock synthesizer and a temperature compensated tunable oscillator. Both of these circuits employ a self-correcting Delay Locked Loop (DLL). The DLL provides multiple clock phases that are combined to produce the desired output frequency for the synthesizer and provides temperature compensated biasing for the tunable oscillator. With a 2 V supply the measured RMS jitter for the 1 GHz synthesizer output was 3.2 ps. With a 3.3 V supply RMS jitter of 3.1 ps was measured for a 1.6 GHz output. The tunable oscillator has a 1.8% frequency variation over an ambient temperature range from 0 to 85/spl deg/C. The circuits were fabricated on a generic 0.5 /spl mu/m digital CMOS process.