{"title":"加速MUSIC方法在可重构硬件上的源代码定位","authors":"A. Ahmedsaid, A. Amira, A. Bouridane","doi":"10.1109/ISCAS.2004.1328760","DOIUrl":null,"url":null,"abstract":"This paper presents an implementation of the high resolution source localisation method MUSIC on an FPGA system. This method exploits the eigenvalue decomposition (EVD) of the correlation matrix generated from the signals received at different sensors. An efficient architecture for the computation of the singular value decomposition (SVD) and the EVD based on the Brent, Luk, Van loan (BLV) systolic array has been proposed. The architecture is three times more efficient and faster than the existing BLV structure. An optimised implementation has been efficiently carried out on the PPRC1000 board using a high level language for hardware design \"Handel-C\".","PeriodicalId":6445,"journal":{"name":"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)","volume":"245 1","pages":"III-369"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Accelerating MUSIC method on reconfigurable hardware for source localisation\",\"authors\":\"A. Ahmedsaid, A. Amira, A. Bouridane\",\"doi\":\"10.1109/ISCAS.2004.1328760\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an implementation of the high resolution source localisation method MUSIC on an FPGA system. This method exploits the eigenvalue decomposition (EVD) of the correlation matrix generated from the signals received at different sensors. An efficient architecture for the computation of the singular value decomposition (SVD) and the EVD based on the Brent, Luk, Van loan (BLV) systolic array has been proposed. The architecture is three times more efficient and faster than the existing BLV structure. An optimised implementation has been efficiently carried out on the PPRC1000 board using a high level language for hardware design \\\"Handel-C\\\".\",\"PeriodicalId\":6445,\"journal\":{\"name\":\"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)\",\"volume\":\"245 1\",\"pages\":\"III-369\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2004.1328760\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2004.1328760","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
摘要
本文提出了一种在FPGA系统上实现高分辨率源定位方法MUSIC的方法。该方法利用不同传感器接收到的信号产生的相关矩阵的特征值分解(EVD)。提出了一种基于Brent, Luk, Van loan (BLV)收缩阵列的奇异值分解(SVD)和EVD的高效计算体系。该架构的效率和速度是现有BLV结构的三倍。使用硬件设计的高级语言“Handel-C”,在PPRC1000板上有效地进行了优化实现。
Accelerating MUSIC method on reconfigurable hardware for source localisation
This paper presents an implementation of the high resolution source localisation method MUSIC on an FPGA system. This method exploits the eigenvalue decomposition (EVD) of the correlation matrix generated from the signals received at different sensors. An efficient architecture for the computation of the singular value decomposition (SVD) and the EVD based on the Brent, Luk, Van loan (BLV) systolic array has been proposed. The architecture is three times more efficient and faster than the existing BLV structure. An optimised implementation has been efficiently carried out on the PPRC1000 board using a high level language for hardware design "Handel-C".