块数字滤波器的舍入噪声分析以级联形式实现

Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems Pub Date : 1996-11-18 DOI:10.1109/APCAS.1996.569271

Uipil Chong, Soon-Jong Kim

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引用次数: 0

摘要

块处理算法适用于并行处理系统上数字滤波器的高速实现。舍入噪声通过使用状态变量公式的块滤波器的内部结构进行引导。在本文中，我们计算并比较了各种尚未研究的块滤波器结构的输出舍入噪声增益。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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The roundoff noise analysis for block digital filters realized in cascade form

The block processing algorithm is suitable for high speed implementation of digital filters on parallel processing systems. Roundoff noise is guided via the internal structure of the block filter using a state variable formulation. In this paper, we calculate and compare output roundoff noise gain for various block filter structures, which have not been investigated yet.

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Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems

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