安全性的值预测(VPsec):对抗现代微处理器中的故障攻击

Rami Sheikh, Rosario Cammarota, Wenjia Ruan
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引用次数: 2

摘要

这项工作提出了VPsec,一种新颖的纯硬件方案,利用实施例中的值预测和系统设计来减轻通用微处理器中的故障攻击。VPsec的设计增加了现代微处理器中故障检测逻辑和反应逻辑的值预测方案,以减轻对数据路径和值预测器本身的故障攻击。相对于支持值预测的基准处理器,VPsec需要最小的硬件更改(可忽略的区域影响),它没有软件开销(内存占用不会增加),并且,在常见的攻击场景下,它保留了值预测的大部分性能优势。我们对VPsec的评估证明了它在对抗故障攻击和保持现代微处理器性能方面的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Value prediction for security (VPsec): Countering fault attacks in modern microprocessors
This work proposes VPsec, a novel hardware-only scheme that leverages value prediction in an embodiment and system design to mitigate fault attacks in general purpose microprocessors. The design of VPsec augments value prediction schemes in modern microprocessors with fault detection logic and reaction logic, to mitigate fault attacks to both the datapath and the value predictor itself. VPsec requires minimal hardware changes (negligible area impact) with respect to a baseline processor supporting value prediction, it has no software overheads {no increase in memory footprint), and, under common attack scenarios, it retains most of the performance benefits of value prediction. Our evaluation of VPsec demonstrates its efficacy in countering fault attacks and retaining performance in modern microprocessors.
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