一种用于计算修正离散正弦变换的硬件加速器

Annals Series on History and Archaeology Academy of Romanian Scientists Pub Date : 2021-01-01 DOI:10.56082/annalsarsciinfo.2021.1-2.57

D. Chiper

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引用次数: 0

摘要

本工作提出了一个硬件加速器的有效硬件实现，该硬件加速器使用一种新的VLSI算法来计算修正离散正弦变换(MDST)，该算法基于MDST算法的适当重新表述，使用一些辅助输入和输出序列。所获得的硬件实现使用仅基于加法器/减法器的低复杂度实现，并且具有可用于显著降低功耗的简化关键路径。

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A HARDWARE ACCELERATOR FOR THE COMPUTATION OF MODIFIED DISCRETE SINE TRANSFORM

This work presents an efficient hardware implementation of a hardware accelerator for the computation of the Modified Discrete Sine transform (MDST) using a new VLSI algorithm based on a appropriate reformulation of the MDST algorithm using some auxiliary input and output sequences. The obtained hardware implementation is using a low complexity implementation based on only adders/subtracters and has a reduced critical path that can be exploited to obtain a significant reduction of the power consumption.

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来源期刊

Annals Series on History and Archaeology Academy of Romanian Scientists

自引率

0.00%

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审稿时长

15 weeks