{"title":"用于图像压缩的提升小波乘法器的两个表达式的符号幂","authors":"Yoshihide Tonomura, Masahiro Iwahashi, Tadashi Tsubone, Noriyoshi Kambayashi","doi":"10.1002/ecjc.20272","DOIUrl":null,"url":null,"abstract":"<p>For image compression, frequency conversions such as the discrete cosine transform (DCT) and the wavelet transform (DWT) have been widely used. The multiplier coefficients used in these conversions are in general defined as real numbers, but they are approximated by a finite word length in the hardware configuration. This causes degradation of the reconstructed images due to mismatch of the coefficient values for the forward and backward transforms. In order to reduce the degradation of the reconstructed images caused by coefficient mismatch, a sufficiently long word length can be provided in setting the finite word length. However, since the compressed image data undergo quantization processing prior to entropy encoding in general, a word length greater than a certain length causes redundancy. Hence, this paper proposes a method in which the coefficient values of each multiplier are provided by the signed power-of-two (SPT) representation, using a sum of powers of 2 with as small a (finite) number of terms as possible, so that the error caused by coefficient mismatch is smaller than the error caused by quantization. In this way, a minimum-size wavelet circuit can be constructed in which the effect of coefficient mismatch between the forward and backward transformations cannot be visually recognized. It was experimentally confirmed by an experiment using the HDL language that the size of the circuit configuration used in the proposed method could be reduced by about 50% in comparison with the circuit in which the sum of the same number of powers of 2 is assigned to each multiplier coefficient. © 2007 Wiley Periodicals, Inc. Electron Comm Jpn Pt 3, 90(7): 47– 57, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjc.20272</p>","PeriodicalId":100407,"journal":{"name":"Electronics and Communications in Japan (Part III: Fundamental Electronic Science)","volume":"90 7","pages":"47-57"},"PeriodicalIF":0.0000,"publicationDate":"2007-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1002/ecjc.20272","citationCount":"0","resultStr":"{\"title\":\"Signed power-of-two expression for multipliers of lifting wavelet for image compression\",\"authors\":\"Yoshihide Tonomura, Masahiro Iwahashi, Tadashi Tsubone, Noriyoshi Kambayashi\",\"doi\":\"10.1002/ecjc.20272\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>For image compression, frequency conversions such as the discrete cosine transform (DCT) and the wavelet transform (DWT) have been widely used. The multiplier coefficients used in these conversions are in general defined as real numbers, but they are approximated by a finite word length in the hardware configuration. This causes degradation of the reconstructed images due to mismatch of the coefficient values for the forward and backward transforms. In order to reduce the degradation of the reconstructed images caused by coefficient mismatch, a sufficiently long word length can be provided in setting the finite word length. However, since the compressed image data undergo quantization processing prior to entropy encoding in general, a word length greater than a certain length causes redundancy. Hence, this paper proposes a method in which the coefficient values of each multiplier are provided by the signed power-of-two (SPT) representation, using a sum of powers of 2 with as small a (finite) number of terms as possible, so that the error caused by coefficient mismatch is smaller than the error caused by quantization. In this way, a minimum-size wavelet circuit can be constructed in which the effect of coefficient mismatch between the forward and backward transformations cannot be visually recognized. It was experimentally confirmed by an experiment using the HDL language that the size of the circuit configuration used in the proposed method could be reduced by about 50% in comparison with the circuit in which the sum of the same number of powers of 2 is assigned to each multiplier coefficient. © 2007 Wiley Periodicals, Inc. Electron Comm Jpn Pt 3, 90(7): 47– 57, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjc.20272</p>\",\"PeriodicalId\":100407,\"journal\":{\"name\":\"Electronics and Communications in Japan (Part III: Fundamental Electronic Science)\",\"volume\":\"90 7\",\"pages\":\"47-57\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-03-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1002/ecjc.20272\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electronics and Communications in Japan (Part III: Fundamental Electronic Science)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://onlinelibrary.wiley.com/doi/10.1002/ecjc.20272\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electronics and Communications in Japan (Part III: Fundamental Electronic Science)","FirstCategoryId":"1085","ListUrlMain":"https://onlinelibrary.wiley.com/doi/10.1002/ecjc.20272","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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