{"title":"基于频率偏移的环形振荡器物理不可控制函数","authors":"Jiliang Zhang;Xiao Tan;Yuanjing Zhang;Weizheng Wang;Zheng Qin","doi":"10.1109/TMSCS.2018.2877737","DOIUrl":null,"url":null,"abstract":"Weak Physical Unclonable Function (PUF) is a promising lightweight hardware security primitive that is used for secret key generation without the requirement of secure nonvolatile electrically erasable programmable read-only memory (EEPROM) or battery backed static random-access memory (SRAM) for resource-limited applications such as Internet of Thing (IoT) and embedded systems. The Ring Oscillator (RO) PUF is one of the most popular weak PUFs that can generate the volatile key by comparing the frequency difference between any two ROs. However, it is difficult for the RO PUF to maintain an absolutely stable response with operating environment varies. In order to eliminate the impact of environment factors, previous RO PUFs incur significant hardware overheads to improve the reliability. This paper proposes a frequency offset-based RO PUF structure which exhibits high reliability and low hardware overhead. The key idea is to make the frequency difference larger than a given threshold by offsetting the frequencies of RO pairs to improve reliability. Prototype implementation on Xilinx 65 nm Field-programmable Gate Arrays (FPGAs) shows the low overhead of the new structure and 100 percent reliability with temperature range of 45 \n<inline-formula><tex-math>$^\\circ \\mathrm{C}$</tex-math></inline-formula>\n \n<inline-formula><tex-math>$\\sim$</tex-math></inline-formula>\n 95 \n<inline-formula><tex-math>$^\\circ \\mathrm{C}$</tex-math></inline-formula>\n.","PeriodicalId":100643,"journal":{"name":"IEEE Transactions on Multi-Scale Computing Systems","volume":"4 4","pages":"711-721"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TMSCS.2018.2877737","citationCount":"21","resultStr":"{\"title\":\"Frequency Offset-Based Ring Oscillator Physical Unclonable Function\",\"authors\":\"Jiliang Zhang;Xiao Tan;Yuanjing Zhang;Weizheng Wang;Zheng Qin\",\"doi\":\"10.1109/TMSCS.2018.2877737\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Weak Physical Unclonable Function (PUF) is a promising lightweight hardware security primitive that is used for secret key generation without the requirement of secure nonvolatile electrically erasable programmable read-only memory (EEPROM) or battery backed static random-access memory (SRAM) for resource-limited applications such as Internet of Thing (IoT) and embedded systems. The Ring Oscillator (RO) PUF is one of the most popular weak PUFs that can generate the volatile key by comparing the frequency difference between any two ROs. However, it is difficult for the RO PUF to maintain an absolutely stable response with operating environment varies. In order to eliminate the impact of environment factors, previous RO PUFs incur significant hardware overheads to improve the reliability. This paper proposes a frequency offset-based RO PUF structure which exhibits high reliability and low hardware overhead. The key idea is to make the frequency difference larger than a given threshold by offsetting the frequencies of RO pairs to improve reliability. Prototype implementation on Xilinx 65 nm Field-programmable Gate Arrays (FPGAs) shows the low overhead of the new structure and 100 percent reliability with temperature range of 45 \\n<inline-formula><tex-math>$^\\\\circ \\\\mathrm{C}$</tex-math></inline-formula>\\n \\n<inline-formula><tex-math>$\\\\sim$</tex-math></inline-formula>\\n 95 \\n<inline-formula><tex-math>$^\\\\circ \\\\mathrm{C}$</tex-math></inline-formula>\\n.\",\"PeriodicalId\":100643,\"journal\":{\"name\":\"IEEE Transactions on Multi-Scale Computing Systems\",\"volume\":\"4 4\",\"pages\":\"711-721\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1109/TMSCS.2018.2877737\",\"citationCount\":\"21\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Multi-Scale Computing Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/8506395/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Multi-Scale Computing Systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/8506395/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Frequency Offset-Based Ring Oscillator Physical Unclonable Function
Weak Physical Unclonable Function (PUF) is a promising lightweight hardware security primitive that is used for secret key generation without the requirement of secure nonvolatile electrically erasable programmable read-only memory (EEPROM) or battery backed static random-access memory (SRAM) for resource-limited applications such as Internet of Thing (IoT) and embedded systems. The Ring Oscillator (RO) PUF is one of the most popular weak PUFs that can generate the volatile key by comparing the frequency difference between any two ROs. However, it is difficult for the RO PUF to maintain an absolutely stable response with operating environment varies. In order to eliminate the impact of environment factors, previous RO PUFs incur significant hardware overheads to improve the reliability. This paper proposes a frequency offset-based RO PUF structure which exhibits high reliability and low hardware overhead. The key idea is to make the frequency difference larger than a given threshold by offsetting the frequencies of RO pairs to improve reliability. Prototype implementation on Xilinx 65 nm Field-programmable Gate Arrays (FPGAs) shows the low overhead of the new structure and 100 percent reliability with temperature range of 45
$^\circ \mathrm{C}$$\sim$
95
$^\circ \mathrm{C}$
.