基于双神经网络技术的高速异步SAR ADC模拟侧信道攻击

IF 0.6 4区工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC

IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI:10.1587/transele.2022cts0002

R. Takahashi, Takuji Miki, M. Nagata

{"title":"基于双神经网络技术的高速异步SAR ADC模拟侧信道攻击","authors":"R. Takahashi, Takuji Miki, M. Nagata","doi":"10.1587/transele.2022cts0002","DOIUrl":null,"url":null,"abstract":"SUMMARY This brief presents a side-channel attack (SCA) technique on a high-speed asynchronous successive approximation register (SAR) analog-to-digitalconverter(ADC).Theproposeddualneuralnetworkbasedonmultiplenoisewaveformsseparatelydisclosessignandabsolutevalue informationofinputsignalswhicharehiddenbythedifferentialstructureandhigh-speedasynchronousoperation.ThetargetSARADCandon-chip noisemonitorsaredesignedonasingleprototypechipforSCAdemon-stration.Fabricatedin40nm,theexperimentalresultsshowtheproposed attack on the asynchronous SAR ADC successfully restores the input data with a competitive accuracy within 300mV rms error.","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":null,"pages":null},"PeriodicalIF":0.6000,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An Analog Side-Channel Attack on a High-Speed Asynchronous SAR ADC Using Dual Neural Network Technique\",\"authors\":\"R. Takahashi, Takuji Miki, M. Nagata\",\"doi\":\"10.1587/transele.2022cts0002\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"SUMMARY This brief presents a side-channel attack (SCA) technique on a high-speed asynchronous successive approximation register (SAR) analog-to-digitalconverter(ADC).Theproposeddualneuralnetworkbasedonmultiplenoisewaveformsseparatelydisclosessignandabsolutevalue informationofinputsignalswhicharehiddenbythedifferentialstructureandhigh-speedasynchronousoperation.ThetargetSARADCandon-chip noisemonitorsaredesignedonasingleprototypechipforSCAdemon-stration.Fabricatedin40nm,theexperimentalresultsshowtheproposed attack on the asynchronous SAR ADC successfully restores the input data with a competitive accuracy within 300mV rms error.\",\"PeriodicalId\":50384,\"journal\":{\"name\":\"IEICE Transactions on Electronics\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.6000,\"publicationDate\":\"2023-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEICE Transactions on Electronics\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1587/transele.2022cts0002\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEICE Transactions on Electronics","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1587/transele.2022cts0002","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

摘要

摘要介绍了一种高速异步连续逼近寄存器(SAR)模数转换器(ADC)的侧信道攻击(SCA)技术。Theproposeddualneuralnetworkbasedonmultiplenoisewaveformsseparatelydisclosessignandabsolutevalue informationofinputsignalswhicharehiddenbythedifferentialstructureandhigh-speedasynchronousoperation。ThetargetSARADCandon-chip noisemonitorsaredesignedonasingleprototypechipforSCAdemon-stration。实验结果表明，所提出的针对异步SAR ADC的攻击成功地恢复了输入数据，并以300mV的均方根误差为竞争精度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

An Analog Side-Channel Attack on a High-Speed Asynchronous SAR ADC Using Dual Neural Network Technique

SUMMARY This brief presents a side-channel attack (SCA) technique on a high-speed asynchronous successive approximation register (SAR) analog-to-digitalconverter(ADC).Theproposeddualneuralnetworkbasedonmultiplenoisewaveformsseparatelydisclosessignandabsolutevalue informationofinputsignalswhicharehiddenbythedifferentialstructureandhigh-speedasynchronousoperation.ThetargetSARADCandon-chip noisemonitorsaredesignedonasingleprototypechipforSCAdemon-stration.Fabricatedin40nm,theexperimentalresultsshowtheproposed attack on the asynchronous SAR ADC successfully restores the input data with a competitive accuracy within 300mV rms error.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

IEICE Transactions on Electronics 工程技术-工程：电子与电气

CiteScore

1.00

自引率

20.00%

发文量

审稿时长

3-6 weeks

期刊介绍： Currently, the IEICE has ten sections nationwide. Each section operates under the leadership of a section chief, four section secretaries and about 20 section councilors. Sections host lecture meetings, seminars and industrial tours, and carry out other activities. Topics: Integrated Circuits, Semiconductor Materials and Devices, Quantum Electronics, Opto-Electronics, Superconductive Electronics, Electronic Displays, Microwave and Millimeter Wave Technologies, Vacuum and Beam Technologies, Recording and Memory Technologies, Electromagnetic Theory.