用于物联网异常检测的集成功率签名生成电路

IF 2.1 4区计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

ACM Journal on Emerging Technologies in Computing Systems Pub Date : 2022-01-31 DOI:10.1145/3460476

David Thompson, Haibo Wang

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引用次数: 4

摘要

这项工作提出了一种监测物联网设备的功率特征以检测操作异常的方法。它不需要笨重的测量设备，这要归功于所提出的功率签名生成电路，可以集成到LDO稳压器中。该电路采用130纳米CMOS技术实现，并通过无线传感器测量功率迹线进行仿真。由此可见，所产生的功率特征能准确反映功耗，并可用于区分不同的工作条件，如无线传输水平、数据采样率和单片机UART通信。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Integrated Power Signature Generation Circuit for IoT Abnormality Detection

This work presents a methodology to monitor the power signature of IoT devices for detecting operation abnormality. It does not require bulky measurement equipment thanks to the proposed power signature generation circuit which can be integrated into LDO voltage regulators. The proposed circuit is implemented using a 130 nm CMOS technology and simulated with power trace measured from a wireless sensor. It shows the generated power signature accurately reflects the power consumption and can be used to distinguish different operation conditions, such as wireless transmission levels, data sampling rates and microcontroller UART communications.

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来源期刊

ACM Journal on Emerging Technologies in Computing Systems 工程技术-工程：电子与电气

CiteScore

4.80

自引率

4.50%

发文量

审稿时长

3 months

期刊介绍： The Journal of Emerging Technologies in Computing Systems invites submissions of original technical papers describing research and development in emerging technologies in computing systems. Major economic and technical challenges are expected to impede the continued scaling of semiconductor devices. This has resulted in the search for alternate mechanical, biological/biochemical, nanoscale electronic, asynchronous and quantum computing and sensor technologies. As the underlying nanotechnologies continue to evolve in the labs of chemists, physicists, and biologists, it has become imperative for computer scientists and engineers to translate the potential of the basic building blocks (analogous to the transistor) emerging from these labs into information systems. Their design will face multiple challenges ranging from the inherent (un)reliability due to the self-assembly nature of the fabrication processes for nanotechnologies, from the complexity due to the sheer volume of nanodevices that will have to be integrated for complex functionality, and from the need to integrate these new nanotechnologies with silicon devices in the same system. The journal provides comprehensive coverage of innovative work in the specification, design analysis, simulation, verification, testing, and evaluation of computing systems constructed out of emerging technologies and advanced semiconductors