N. Khan, V. S. Rao, S. Lim, H. We, V. Lee, Xiaowu Zhang, E. Liao, R. Nagarajan, T. Chai, V. Kripesh, J. Lau
{"title":"系统封装用TSV三维硅模块的研制","authors":"N. Khan, V. S. Rao, S. Lim, H. We, V. Lee, Xiaowu Zhang, E. Liao, R. Nagarajan, T. Chai, V. Kripesh, J. Lau","doi":"10.1109/TCAPT.2009.2037608","DOIUrl":null,"url":null,"abstract":"Portable electronic products demand multifunctional module comprising of digital, radio frequency and memory functions. Through silicon via (TSV) technology provides a means of implementing complex, multifunctional integration with a higher packing density for a system in package. A 3-D silicon module with TSV has been developed in this paper. Thermo-mechanical analysis has been performed and TSV interconnect design is optimized. Multiple chips representing different functional circuits are assembled using wirebond and flip chip interconnection methods. Silicon carrier is fabricated using via-first approach, the barrier copper via is exposed by the backgrinding process. A two-stack silicon module is developed and module fabrication details are given in this paper. The module reliability has been evaluated under temperature cycling (-40/125°C ) and drop test.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"3-9"},"PeriodicalIF":0.0000,"publicationDate":"2010-02-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2037608","citationCount":"112","resultStr":"{\"title\":\"Development of 3-D Silicon Module With TSV for System in Packaging\",\"authors\":\"N. Khan, V. S. Rao, S. Lim, H. We, V. Lee, Xiaowu Zhang, E. Liao, R. Nagarajan, T. Chai, V. Kripesh, J. Lau\",\"doi\":\"10.1109/TCAPT.2009.2037608\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Portable electronic products demand multifunctional module comprising of digital, radio frequency and memory functions. Through silicon via (TSV) technology provides a means of implementing complex, multifunctional integration with a higher packing density for a system in package. A 3-D silicon module with TSV has been developed in this paper. Thermo-mechanical analysis has been performed and TSV interconnect design is optimized. Multiple chips representing different functional circuits are assembled using wirebond and flip chip interconnection methods. Silicon carrier is fabricated using via-first approach, the barrier copper via is exposed by the backgrinding process. A two-stack silicon module is developed and module fabrication details are given in this paper. The module reliability has been evaluated under temperature cycling (-40/125°C ) and drop test.\",\"PeriodicalId\":55013,\"journal\":{\"name\":\"IEEE Transactions on Components and Packaging Technologies\",\"volume\":\"33 1\",\"pages\":\"3-9\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-02-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2037608\",\"citationCount\":\"112\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Components and Packaging Technologies\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TCAPT.2009.2037608\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components and Packaging Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TCAPT.2009.2037608","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Development of 3-D Silicon Module With TSV for System in Packaging
Portable electronic products demand multifunctional module comprising of digital, radio frequency and memory functions. Through silicon via (TSV) technology provides a means of implementing complex, multifunctional integration with a higher packing density for a system in package. A 3-D silicon module with TSV has been developed in this paper. Thermo-mechanical analysis has been performed and TSV interconnect design is optimized. Multiple chips representing different functional circuits are assembled using wirebond and flip chip interconnection methods. Silicon carrier is fabricated using via-first approach, the barrier copper via is exposed by the backgrinding process. A two-stack silicon module is developed and module fabrication details are given in this paper. The module reliability has been evaluated under temperature cycling (-40/125°C ) and drop test.