{"title":"采用不同电压电流传送器的分数阶低通滤波器的设计","authors":"B. T. Krishna, Midhunchakkaravathy Janarthanan","doi":"10.26636/jtit.2023.169123","DOIUrl":null,"url":null,"abstract":"In this paper, an active implementation of a differential voltage current conveyor (DVCC) based on a low-pass filter operating in the fractional order domain is presented. The transfer function for a fractional order system is dependent on the rational approximation of sα. Different methods used for calculating the rational approximation, including Carlson, Elkhazalil, and curve fitting, are evaluated here. Finally, to validate the theoretical results, a fractional order Butterworth filter is simulated in the Pspice environment using the 0.5 micrometer CMOS technology with an R-C network-based fractional order capacitor. Additionally, using the Monte Carlo analysis, the impact of current and voltage faults on DVCC response is investigated. It has been inferred that realization with a wider bandwidth is possible.","PeriodicalId":38425,"journal":{"name":"Journal of Telecommunications and Information Technology","volume":" ","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2023-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of a Fractional Order Low-pass Filter Using a Differential Voltage Current Conveyor\",\"authors\":\"B. T. Krishna, Midhunchakkaravathy Janarthanan\",\"doi\":\"10.26636/jtit.2023.169123\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, an active implementation of a differential voltage current conveyor (DVCC) based on a low-pass filter operating in the fractional order domain is presented. The transfer function for a fractional order system is dependent on the rational approximation of sα. Different methods used for calculating the rational approximation, including Carlson, Elkhazalil, and curve fitting, are evaluated here. Finally, to validate the theoretical results, a fractional order Butterworth filter is simulated in the Pspice environment using the 0.5 micrometer CMOS technology with an R-C network-based fractional order capacitor. Additionally, using the Monte Carlo analysis, the impact of current and voltage faults on DVCC response is investigated. It has been inferred that realization with a wider bandwidth is possible.\",\"PeriodicalId\":38425,\"journal\":{\"name\":\"Journal of Telecommunications and Information Technology\",\"volume\":\" \",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-06-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Telecommunications and Information Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.26636/jtit.2023.169123\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Telecommunications and Information Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.26636/jtit.2023.169123","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
Design of a Fractional Order Low-pass Filter Using a Differential Voltage Current Conveyor
In this paper, an active implementation of a differential voltage current conveyor (DVCC) based on a low-pass filter operating in the fractional order domain is presented. The transfer function for a fractional order system is dependent on the rational approximation of sα. Different methods used for calculating the rational approximation, including Carlson, Elkhazalil, and curve fitting, are evaluated here. Finally, to validate the theoretical results, a fractional order Butterworth filter is simulated in the Pspice environment using the 0.5 micrometer CMOS technology with an R-C network-based fractional order capacitor. Additionally, using the Monte Carlo analysis, the impact of current and voltage faults on DVCC response is investigated. It has been inferred that realization with a wider bandwidth is possible.