CMOS准浮门电路箝位特性的电学表征

IF 0.9 4区工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Journal of Circuits Systems and Computers Pub Date : 2023-08-18 DOI:10.1142/s0218126624500683

J. E. Molinar-Solís, Daniel Sanchez-Arias, Daniel Fajardo-Delgado, J. Ocampo-Hidalgo, I. Padilla-Cantoya

引用次数: 0

摘要

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Electrical Characterization of the Clamping Behavior on CMOS quasi Floating-gate Circuits

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来源期刊

Journal of Circuits Systems and Computers 工程技术-工程：电子与电气

CiteScore

2.80

自引率

26.70%

发文量

350

审稿时长

5.4 months

期刊介绍： Journal of Circuits, Systems, and Computers covers a wide scope, ranging from mathematical foundations to practical engineering design in the general areas of circuits, systems, and computers with focus on their circuit aspects. Although primary emphasis will be on research papers, survey, expository and tutorial papers are also welcome. The journal consists of two sections: Papers - Contributions in this section may be of a research or tutorial nature. Research papers must be original and must not duplicate descriptions or derivations available elsewhere. The author should limit paper length whenever this can be done without impairing quality. Letters - This section provides a vehicle for speedy publication of new results and information of current interest in circuits, systems, and computers. Focus will be directed to practical design- and applications-oriented contributions, but publication in this section will not be restricted to this material. These letters are to concentrate on reporting the results obtained, their significance and the conclusions, while including only the minimum of supporting details required to understand the contribution. Publication of a manuscript in this manner does not preclude a later publication with a fully developed version.