用于宽负载应用的0.25-V三级状态反馈体驱动OTA

Q4 Engineering
Sreeteja Reddy Kotha, Karuppanan P, A. K. Gautam, Manmath Suryavanshi
{"title":"用于宽负载应用的0.25-V三级状态反馈体驱动OTA","authors":"Sreeteja Reddy Kotha, Karuppanan P, A. K. Gautam, Manmath Suryavanshi","doi":"10.29292/jics.v16i3.498","DOIUrl":null,"url":null,"abstract":"This article employs a nested state feedback compensation technique to a three-stage bulk-driven operational transconductance amplifier (OTA). The projected OTA circuit consists of a bulk-driven PMOS amplifier, gate-driven NMOS amplifier, and common source (CS) amplifier. The entire transistors in the amplifier core are configuredwith self-cascode transistor topology to increase its output impedance. All transistors are designed to operate in a weak inversion in order to dissipate less power. Cross-coupled transistor pair topology in the bulk-driven stage allows to improve the effective transconductance of OTA. The CS amplifier can drive a large load capacitor.  The polarities and transconductance gains of feedback blocks are controlled appropriately to obtain the desired DC gain and bandwidth. The capacitor-less compensation strategy allows the fabrication of the OTA using the minimum area. Conventional bulk-driven miler OTA, Bulk-driven stage improved indirect-feedback OTA (BSIF OTA), Gate-driven stage added bulk-driven OTA (GSIF OTA), and proposed bulk-driven OTA topologies are designed and simulated using cadence spectre tool at 25 mV supply voltage in the 65nm CMOS process. These OTA circuits are analyzed and compared in terms of parameters like DC gain, unity-gain frequency, phase margin, CMRR, power dissipated, slew rate, and input referred noise.","PeriodicalId":39974,"journal":{"name":"Journal of Integrated Circuits and Systems","volume":" ","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2021-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 0.25-V Three-stage State Feedback Bulk-driven OTA for Wide Range Load Applications\",\"authors\":\"Sreeteja Reddy Kotha, Karuppanan P, A. K. Gautam, Manmath Suryavanshi\",\"doi\":\"10.29292/jics.v16i3.498\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article employs a nested state feedback compensation technique to a three-stage bulk-driven operational transconductance amplifier (OTA). The projected OTA circuit consists of a bulk-driven PMOS amplifier, gate-driven NMOS amplifier, and common source (CS) amplifier. The entire transistors in the amplifier core are configuredwith self-cascode transistor topology to increase its output impedance. All transistors are designed to operate in a weak inversion in order to dissipate less power. Cross-coupled transistor pair topology in the bulk-driven stage allows to improve the effective transconductance of OTA. The CS amplifier can drive a large load capacitor.  The polarities and transconductance gains of feedback blocks are controlled appropriately to obtain the desired DC gain and bandwidth. The capacitor-less compensation strategy allows the fabrication of the OTA using the minimum area. Conventional bulk-driven miler OTA, Bulk-driven stage improved indirect-feedback OTA (BSIF OTA), Gate-driven stage added bulk-driven OTA (GSIF OTA), and proposed bulk-driven OTA topologies are designed and simulated using cadence spectre tool at 25 mV supply voltage in the 65nm CMOS process. These OTA circuits are analyzed and compared in terms of parameters like DC gain, unity-gain frequency, phase margin, CMRR, power dissipated, slew rate, and input referred noise.\",\"PeriodicalId\":39974,\"journal\":{\"name\":\"Journal of Integrated Circuits and Systems\",\"volume\":\" \",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-12-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Integrated Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.29292/jics.v16i3.498\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Integrated Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.29292/jics.v16i3.498","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 0

摘要

本文将嵌套状态反馈补偿技术应用于三级体驱动运算跨导放大器(OTA)。投影OTA电路由体驱动PMOS放大器、栅极驱动NMOS放大器和共源(CS)放大器组成。放大器核心中的整个晶体管都配置有自级联晶体管拓扑结构,以增加其输出阻抗。所有晶体管都被设计为在弱反转中工作,以便消耗更少的功率。体驱动级中的交叉耦合晶体管对拓扑结构允许提高OTA的有效跨导。CS放大器可以驱动大负载电容器。适当地控制反馈块的极性和跨导增益,以获得期望的DC增益和带宽。无电容补偿策略允许使用最小面积来制造OTA。在65nm CMOS工艺中,使用cadence spectre工具在25mV电源电压下设计并模拟了传统的体驱动miler OTA、体驱动级改进的间接反馈OTA(BSIF OTA)、添加体驱动OTA的栅极驱动级(GSIF OTA)以及所提出的体驱动OTA拓扑。从直流增益、单位增益频率、相位裕度、CMRR、功率耗散、转换速率和输入参考噪声等参数对这些OTA电路进行了分析和比较。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 0.25-V Three-stage State Feedback Bulk-driven OTA for Wide Range Load Applications
This article employs a nested state feedback compensation technique to a three-stage bulk-driven operational transconductance amplifier (OTA). The projected OTA circuit consists of a bulk-driven PMOS amplifier, gate-driven NMOS amplifier, and common source (CS) amplifier. The entire transistors in the amplifier core are configuredwith self-cascode transistor topology to increase its output impedance. All transistors are designed to operate in a weak inversion in order to dissipate less power. Cross-coupled transistor pair topology in the bulk-driven stage allows to improve the effective transconductance of OTA. The CS amplifier can drive a large load capacitor.  The polarities and transconductance gains of feedback blocks are controlled appropriately to obtain the desired DC gain and bandwidth. The capacitor-less compensation strategy allows the fabrication of the OTA using the minimum area. Conventional bulk-driven miler OTA, Bulk-driven stage improved indirect-feedback OTA (BSIF OTA), Gate-driven stage added bulk-driven OTA (GSIF OTA), and proposed bulk-driven OTA topologies are designed and simulated using cadence spectre tool at 25 mV supply voltage in the 65nm CMOS process. These OTA circuits are analyzed and compared in terms of parameters like DC gain, unity-gain frequency, phase margin, CMRR, power dissipated, slew rate, and input referred noise.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
Journal of Integrated Circuits and Systems
Journal of Integrated Circuits and Systems Engineering-Electrical and Electronic Engineering
CiteScore
0.90
自引率
0.00%
发文量
39
期刊介绍: This journal will present state-of-art papers on Integrated Circuits and Systems. It is an effort of both Brazilian Microelectronics Society - SBMicro and Brazilian Computer Society - SBC to create a new scientific journal covering Process and Materials, Device and Characterization, Design, Test and CAD of Integrated Circuits and Systems. The Journal of Integrated Circuits and Systems is published through Special Issues on subjects to be defined by the Editorial Board. Special issues will publish selected papers from both Brazilian Societies annual conferences, SBCCI - Symposium on Integrated Circuits and Systems and SBMicro - Symposium on Microelectronics Technology and Devices.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信