Implementing Serial Communication for the Instructional Processor

An Instructional Processor has been developed for use as a design example in an Advanced Digital Systems course. The architecture is modelled in VHDL and can be simulated using Xilinx design tools to demonstrate operation of the processor. A basic microcontroller is then created by adding memory-mapped input/output (I/O). The system can be synthesized and implemented in hardware on a field programmable gate array (FPGA). The goal of this project was to add serial communication capabilities to the Instructional Processor via software and hardware. The enhanced microcontroller can then be interfaced with multiple peripheral devices. The approach for this project was to adapt a UART (universal asynchronous receiver transmitter), based on the MC6811, to the memory-mapped I/O interface developed for the Instructional Processor. This implementation allows direct access to the UART data registers (receive and transmit), status register (flags), and control register (baud rate). Test programs, written in assembly language, were used to test the communication protocol and timing via VHDL simulation. The FPGA microcontroller was also able to communicate with several serial devices at various baud rates. This project successfully added serial communication capabilities to the Instructional Processor. Software and hardware implementations were developed and tested using VHDL and a Xilinx FPGA. The UART has now been added to the processor design example in the Advanced Digital Systems course, giving students an in-depth look at both the internal details and external interfacing of a real-life system. Feedback has been very positive that the simulations and microcontroller implementation help illustrate fundamental design concepts reinforced by actual functioning hardware.