用于神经微电路定制构建的FPGA仿真引擎。

Hugh T Blair, Jason Cong, Di Wu
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引用次数: 4

摘要

在本文中,我们描述了一个基于fpga的平台,用于高性能和低功耗的模拟由集成与发射(IAF)神经元组成的神经微电路。基于高层次的综合,我们的平台使用设计模板将神经元模型的层次结构映射到逻辑结构。这种方法绕过了高设计复杂性,使优化和设计空间探索变得容易。我们通过模拟各种执行振荡路径集成的神经微电路来展示我们平台的好处,证据表明,这可能是啮齿动物大脑中导航系统的关键组成部分。实验表明,我们的振荡神经微电路FPGA仿真引擎与商用CPU的软件基准相比,可以实现高达39倍的加速,与嵌入式ARM内核相比,可以降低232x的能量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FPGA Simulation Engine for Customized Construction of Neural Microcircuits.

In this paper we describe an FPGA-based platform for high-performance and low-power simulation of neural microcircuits composed from integrate-and-fire (IAF) neurons. Based on high-level synthesis, our platform uses design templates to map hierarchies of neuron model to logic fabrics. This approach bypasses high design complexity and enables easy optimization and design space exploration. We demonstrate the benefits of our platform by simulating a variety of neural microcircuits that perform oscillatory path integration, which evidence suggests may be a critical building block of the navigation system inside a rodent's brain. Experiments show that our FPGA simulation engine for oscillatory neural microcircuits can achieve up to 39× speedup compared to software benchmarks on commodity CPU, and 232× energy reduction compared to embedded ARM core.

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