cuFalcon:高性能Falcon加速的自适应并行GPU实现

IF 5.9 2区 计算机科学 Q1 COMPUTER SCIENCE, THEORY & METHODS
Wenqian Li;Hanyu Wei;Shiyu Shen;Hao Yang;Wangchen Dai;Yunlei Zhao
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引用次数: 0

摘要

量子计算的快速发展开创了后量子密码学的新时代,迫切需要抗量子的数字签名来保护现代通信和交易。在nist标准化候选方案中,Falcon脱颖而出,因为它是一种紧凑的基于格子的签名方案,适用于尺寸敏感型应用程序。在本文中,我们提出了cuFalcon,一种高吞吐量的GPU实现,通过自适应并行策略解决了Falcon的计算瓶颈。在操作层面,我们通过内存高效FFT、自适应并行ffSampling和紧凑的计算模式优化了GPU架构的Falcon关键组件。对于签名级优化,为了提高不同GPU架构的可扩展性,我们实现了三个版本的cuFalcon:原始密钥版本,扩展密钥版本和平衡版本。此外,我们还设计了批处理、流机制和内存池来有效地处理多个签名任务。最终,性能评估显示出显著的改进,原始密钥版本达到每秒172 k签名,扩展密钥版本达到每秒201 k签名。与原始密钥版本相比,平衡版本的吞吐量提高了7%,而与扩展密钥版本相比,内存使用减少了70%。此外,我们的原始密钥版本实现比参考实现高出36.74倍,比最先进的GPU实现提高了2.71倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
cuFalcon: An Adaptive Parallel GPU Implementation for High-Performance Falcon Acceleration
The rapid advancement of quantum computing has ushered in a new era of post-quantum cryptography, urgently demanding quantum-resistant digital signatures to secure modern communications and transactions. Among NIST-standardized candidates, Falcon stands out because it is a compact lattice-based signature scheme suitable for size-sensitive applications. In this paper, we present cuFalcon, a high-throughput GPU implementation of Falcon that addresses its computational bottlenecks through adaptive parallel strategies. At the operational level, we optimize Falcon key components for GPU architectures through memory-efficient FFT, adaptive parallel ffSampling, and a compact computation mode. For signature-level optimization, to improve scalability across different GPU architectures, we implement three versions of cuFalcon: the raw key version, the expanded key version, and the balanced version. Additionally, we design batch processing, streaming mechanisms, and memory pooling to handle multiple signature tasks efficiently. Ultimately, performance evaluations show significant improvements, with the raw key version achieving 172 k signatures per second and the expanded key version reaching 201 k. Compared to the raw key version, the balanced version achieves a 7% improvement in throughput, while compared to the expanded key version, it reduces memory usage by 70%. Furthermore, our raw key version implementation outperforms the reference implementation by 36.74 × and achieves a 2.71× speedup over the state-of-the-art GPU implementation.
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来源期刊
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems 工程技术-工程:电子与电气
CiteScore
11.00
自引率
9.40%
发文量
281
审稿时长
5.6 months
期刊介绍: IEEE Transactions on Parallel and Distributed Systems (TPDS) is published monthly. It publishes a range of papers, comments on previously published papers, and survey articles that deal with the parallel and distributed systems research areas of current importance to our readers. Particular areas of interest include, but are not limited to: a) Parallel and distributed algorithms, focusing on topics such as: models of computation; numerical, combinatorial, and data-intensive parallel algorithms, scalability of algorithms and data structures for parallel and distributed systems, communication and synchronization protocols, network algorithms, scheduling, and load balancing. b) Applications of parallel and distributed computing, including computational and data-enabled science and engineering, big data applications, parallel crowd sourcing, large-scale social network analysis, management of big data, cloud and grid computing, scientific and biomedical applications, mobile computing, and cyber-physical systems. c) Parallel and distributed architectures, including architectures for instruction-level and thread-level parallelism; design, analysis, implementation, fault resilience and performance measurements of multiple-processor systems; multicore processors, heterogeneous many-core systems; petascale and exascale systems designs; novel big data architectures; special purpose architectures, including graphics processors, signal processors, network processors, media accelerators, and other special purpose processors and accelerators; impact of technology on architecture; network and interconnect architectures; parallel I/O and storage systems; architecture of the memory hierarchy; power-efficient and green computing architectures; dependable architectures; and performance modeling and evaluation. d) Parallel and distributed software, including parallel and multicore programming languages and compilers, runtime systems, operating systems, Internet computing and web services, resource management including green computing, middleware for grids, clouds, and data centers, libraries, performance modeling and evaluation, parallel programming paradigms, and programming environments and tools.
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