ARTS:一种近似简化树和基于分割的乘法器

IF 6.2 2区 计算机科学 Q1 COMPUTER SCIENCE, THEORY & METHODS
Mahla Salehi Sheikhali Kelayeh , Sahand Divsalar , Shaghayegh Vahdat , Nima TaheriNejad
{"title":"ARTS:一种近似简化树和基于分割的乘法器","authors":"Mahla Salehi Sheikhali Kelayeh ,&nbsp;Sahand Divsalar ,&nbsp;Shaghayegh Vahdat ,&nbsp;Nima TaheriNejad","doi":"10.1016/j.future.2025.108098","DOIUrl":null,"url":null,"abstract":"<div><div>Due to the increasing use of machine learning applications in daily human life, efficient hardware implementation of these applications has turned into a serious challenge recently. Multipliers are one of the most prevalent, and at the same time expensive (from a hardware perspective), arithmetic units used in such applications. In this paper, a novel approximate multiplier, called ARTS, is designed based on the idea of dividing input operands into different static segments and completing certain steps of the calculation approximately by using simplified reduction trees to sum up the partial products. ARTS manifests significant improvements in hardware characteristics. Namely, 68.6%, 16.5%, and 60% improvements in power, delay, and area are achieved with respect to an exact 8-bit Wallace multiplier, while up to 59.8%, 37.2%, and 52.8% improvements are obtained compared to the other start-of-the-art (SoTA) approximate multipliers. The efficiency of ARTS is assessed in image processing and DNN applications. ARTS shows up to 91.4% and 28.3% better PSNR and 52.4% and 20.5% better SSIM in image multiplication and Sobel edge detection applications, respectively, compared to the other SoTA approximate multipliers. In DNN applications, ARTS exhibits outstanding performance, achieving up to 84.8% higher classification accuracy compared to SoTA approximate designs with similar hardware characteristics. Additionally, when compared to SoTA designs offering comparable accuracy, ARTS achieves this performance with up to 191% lower energy consumption.</div></div>","PeriodicalId":55132,"journal":{"name":"Future Generation Computer Systems-The International Journal of Escience","volume":"175 ","pages":"Article 108098"},"PeriodicalIF":6.2000,"publicationDate":"2025-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"ARTS: An approximate reduced tree and segmentation-based multiplier\",\"authors\":\"Mahla Salehi Sheikhali Kelayeh ,&nbsp;Sahand Divsalar ,&nbsp;Shaghayegh Vahdat ,&nbsp;Nima TaheriNejad\",\"doi\":\"10.1016/j.future.2025.108098\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>Due to the increasing use of machine learning applications in daily human life, efficient hardware implementation of these applications has turned into a serious challenge recently. Multipliers are one of the most prevalent, and at the same time expensive (from a hardware perspective), arithmetic units used in such applications. In this paper, a novel approximate multiplier, called ARTS, is designed based on the idea of dividing input operands into different static segments and completing certain steps of the calculation approximately by using simplified reduction trees to sum up the partial products. ARTS manifests significant improvements in hardware characteristics. Namely, 68.6%, 16.5%, and 60% improvements in power, delay, and area are achieved with respect to an exact 8-bit Wallace multiplier, while up to 59.8%, 37.2%, and 52.8% improvements are obtained compared to the other start-of-the-art (SoTA) approximate multipliers. The efficiency of ARTS is assessed in image processing and DNN applications. ARTS shows up to 91.4% and 28.3% better PSNR and 52.4% and 20.5% better SSIM in image multiplication and Sobel edge detection applications, respectively, compared to the other SoTA approximate multipliers. In DNN applications, ARTS exhibits outstanding performance, achieving up to 84.8% higher classification accuracy compared to SoTA approximate designs with similar hardware characteristics. Additionally, when compared to SoTA designs offering comparable accuracy, ARTS achieves this performance with up to 191% lower energy consumption.</div></div>\",\"PeriodicalId\":55132,\"journal\":{\"name\":\"Future Generation Computer Systems-The International Journal of Escience\",\"volume\":\"175 \",\"pages\":\"Article 108098\"},\"PeriodicalIF\":6.2000,\"publicationDate\":\"2025-08-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Future Generation Computer Systems-The International Journal of Escience\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0167739X25003929\",\"RegionNum\":2,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"COMPUTER SCIENCE, THEORY & METHODS\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Future Generation Computer Systems-The International Journal of Escience","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167739X25003929","RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"COMPUTER SCIENCE, THEORY & METHODS","Score":null,"Total":0}
引用次数: 0

摘要

由于机器学习应用在日常生活中的使用越来越多,这些应用的高效硬件实现最近已经成为一个严峻的挑战。乘法器是这类应用程序中使用的最普遍、同时也是最昂贵的算术单元之一(从硬件的角度来看)。本文设计了一种新的近似乘法器ARTS,其思想是将输入操作数划分为不同的静态段,通过简化约简树对部分乘积求和,近似地完成某些计算步骤。ARTS在硬件特性上有显著的改进。也就是说,相对于精确的8位华莱士乘法器,在功率、延迟和面积方面分别实现了68.6%、16.5%和60%的改进,而与其他最先进的近似乘法器(SoTA)相比,可获得59.8%、37.2%和52.8%的改进。评估了ARTS在图像处理和深度神经网络中的应用效率。与其他SoTA近似乘子相比,ARTS在图像乘法和Sobel边缘检测应用中的PSNR分别提高了91.4%和28.3%,SSIM分别提高了52.4%和20.5%。在深度神经网络应用中,ARTS表现出出色的性能,与具有相似硬件特征的SoTA近似设计相比,其分类准确率提高了84.8%。此外,与具有相当精度的SoTA设计相比,ARTS在实现这一性能的同时,能耗降低了191%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
ARTS: An approximate reduced tree and segmentation-based multiplier
Due to the increasing use of machine learning applications in daily human life, efficient hardware implementation of these applications has turned into a serious challenge recently. Multipliers are one of the most prevalent, and at the same time expensive (from a hardware perspective), arithmetic units used in such applications. In this paper, a novel approximate multiplier, called ARTS, is designed based on the idea of dividing input operands into different static segments and completing certain steps of the calculation approximately by using simplified reduction trees to sum up the partial products. ARTS manifests significant improvements in hardware characteristics. Namely, 68.6%, 16.5%, and 60% improvements in power, delay, and area are achieved with respect to an exact 8-bit Wallace multiplier, while up to 59.8%, 37.2%, and 52.8% improvements are obtained compared to the other start-of-the-art (SoTA) approximate multipliers. The efficiency of ARTS is assessed in image processing and DNN applications. ARTS shows up to 91.4% and 28.3% better PSNR and 52.4% and 20.5% better SSIM in image multiplication and Sobel edge detection applications, respectively, compared to the other SoTA approximate multipliers. In DNN applications, ARTS exhibits outstanding performance, achieving up to 84.8% higher classification accuracy compared to SoTA approximate designs with similar hardware characteristics. Additionally, when compared to SoTA designs offering comparable accuracy, ARTS achieves this performance with up to 191% lower energy consumption.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
CiteScore
19.90
自引率
2.70%
发文量
376
审稿时长
10.6 months
期刊介绍: Computing infrastructures and systems are constantly evolving, resulting in increasingly complex and collaborative scientific applications. To cope with these advancements, there is a growing need for collaborative tools that can effectively map, control, and execute these applications. Furthermore, with the explosion of Big Data, there is a requirement for innovative methods and infrastructures to collect, analyze, and derive meaningful insights from the vast amount of data generated. This necessitates the integration of computational and storage capabilities, databases, sensors, and human collaboration. Future Generation Computer Systems aims to pioneer advancements in distributed systems, collaborative environments, high-performance computing, and Big Data analytics. It strives to stay at the forefront of developments in grids, clouds, and the Internet of Things (IoT) to effectively address the challenges posed by these wide-area, fully distributed sensing and computing systems.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信