猎鹰后量子密码的高效NTT/INTT处理器

IF 3.7 2区 计算机科学 Q2 COMPUTER SCIENCE, INFORMATION SYSTEMS
Ghada Alsuhli , Hani Saleh , Mahmoud Al-Qutayri , Baker Mohammad , Thanos Stouraitis
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引用次数: 0

摘要

FALCON是一种基于格子的后量子加密(PQC)数字签名标准,以其紧凑的签名和抗量子攻击而闻名。由于其最近的标准化,其硬件实现仍然是一个开放的挑战,特别是对于密钥生成,这比简单且经过充分研究的签名验证过程要复杂得多。在本文中,针对资源受限的边缘设备,我们提出了一种针对FALCON密钥生成的特定要求量身定制的节能且面积优化的NTT/INTT架构。通过利用ntt友好质数并减少Montgomery约简算法中的乘数大小(针对ASIC实现进行了优化),我们的设计最大限度地降低了硬件复杂性,与最先进的Montgomery约简实现相比,实现了最低的功耗和面积消耗。提出的硬件架构具有处理元素阵列、分布式sram和rom,具有三层可重构性,支持NTT和INTT操作。采用Global Foundries的22纳米FD-SOI工艺设计的专用集成电路(ASIC)估计占地0.04 mm2,在1 GHz时消耗18.2 mW。该处理器的能效是ARM Cortex-M4的700倍,计算速度是ARM Cortex-M4的200倍。它还在最先进的NTT/INTT硬件加速器中实现了最低的面积时间产品和最高的能源效率。通过仔细平衡功耗和计算速度,该设计为在资源有限的设备上部署FALCON密钥生成提供了有效的解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Efficient NTT/INTT processor for FALCON post-quantum cryptography
FALCON is a lattice-based post-quantum cryptographic (PQC) digital signature standard known for its compact signatures and resistance to quantum attacks. Since its recent standardization, its hardware implementation remains an open challenge, particularly for key generation, which is significantly more complex than the simple and well-studied signature verification process. In this paper, targeting edge devices with constrained resources, we present an energy-efficient and area-optimized NTT/INTT architecture tailored to the specific requirements of FALCON key generation. By leveraging NTT-friendly primes and reducing the size of the multipliers in the Montgomery reduction algorithm — optimized for ASIC implementation — our design minimizes hardware complexity, achieving the lowest power and area consumption compared to state-of-the-art Montgomery reduction implementations. The proposed hardware architecture features a processing element array, distributed SRAMs, and ROMs, with three levels of reconfigurability, supporting both NTT and INTT operations. Designed using the Global Foundries’ 22 nm FD-SOI process, an Application-Specific Integrated Circuit (ASIC) is estimated to occupy 0.04 mm2 and consume 18.2 mW at 1 GHz. The proposed processor achieves 700 times greater energy efficiency and performs computations 200 times faster than software implementations on the ARM Cortex-M4. It also achieves the lowest area–time product and highest energy efficiency among state-of-the-art NTT/INTT hardware accelerators. By carefully balancing power consumption and computational speed, this design offers an efficient solution for deploying FALCON key generation on devices with limited resources.
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来源期刊
Journal of Information Security and Applications
Journal of Information Security and Applications Computer Science-Computer Networks and Communications
CiteScore
10.90
自引率
5.40%
发文量
206
审稿时长
56 days
期刊介绍: Journal of Information Security and Applications (JISA) focuses on the original research and practice-driven applications with relevance to information security and applications. JISA provides a common linkage between a vibrant scientific and research community and industry professionals by offering a clear view on modern problems and challenges in information security, as well as identifying promising scientific and "best-practice" solutions. JISA issues offer a balance between original research work and innovative industrial approaches by internationally renowned information security experts and researchers.
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