Junyeol Lee , Hanggyo Jung , Donghyun Jin , Jongwook Jeon
{"title":"探索亚1nm节点的最佳TMDC多通道GAA-FET架构","authors":"Junyeol Lee , Hanggyo Jung , Donghyun Jin , Jongwook Jeon","doi":"10.1016/j.jsamd.2025.100931","DOIUrl":null,"url":null,"abstract":"<div><div>This paper explores the design and optimization of multi-Nanosheet Field-Effect Transistors (mNS-FETs) employing a Transition Metal Dichalcogenide (TMDC) channel, specifically MoS<sub>2</sub>, for the 0.7 nm technology node using calibrated Technology Computer-Aided Design (TCAD) simulations. A comprehensive analysis is conducted at both the device and circuit levels, considering various structural parameters such as the number of MoS<sub>2</sub> layers, vertical and lateral nanosheet stacking configurations, and nanosheet widths. To enable more effective structural optimization, the resistance and capacitance components of the device are carefully segmented, providing a detailed framework for design refinements. The results indicate that a trilayer configuration outperforms its monolayer counterpart by reducing external resistance through an increased surface area, making it the preferred option at a 12 nm gate length. This observation also elucidates the advantage of single lateral stacking over double lateral stacking. While vertical stacking increases the effective width for on-current enhancement, excessive stacking compromises switching speed at the same power level, identifying four vertical stack structures as the optimal configuration. Among the evaluated configurations, the trilayer MoS<sub>2</sub> mNS-FET with four vertical stacks, single lateral stacking, and a 17 nm nanosheet width was identified as the optimal structure for the 0.7 nm node. Furthermore, at the circuit level, the effective width is evaluated to ensure compliance with the circuit area constraints of the target technology node. Analyzing the impact of parasitic resistance and capacitance in the Middle-of-Line (MOL) and Back-End-of-Line (BEOL) reveals that time delay can lead to up to a 58 % degradation in inverter circuit performance. By systematically investigating the impact of MoS<sub>2</sub>-based mNS-FET structures, this study provides critical insights to guide the future design of TMDC-based mNS-FETs.</div></div>","PeriodicalId":17219,"journal":{"name":"Journal of Science: Advanced Materials and Devices","volume":"10 3","pages":"Article 100931"},"PeriodicalIF":6.8000,"publicationDate":"2025-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Exploring optimal TMDC multi-channel GAA-FET architectures at sub-1nm nodes\",\"authors\":\"Junyeol Lee , Hanggyo Jung , Donghyun Jin , Jongwook Jeon\",\"doi\":\"10.1016/j.jsamd.2025.100931\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>This paper explores the design and optimization of multi-Nanosheet Field-Effect Transistors (mNS-FETs) employing a Transition Metal Dichalcogenide (TMDC) channel, specifically MoS<sub>2</sub>, for the 0.7 nm technology node using calibrated Technology Computer-Aided Design (TCAD) simulations. A comprehensive analysis is conducted at both the device and circuit levels, considering various structural parameters such as the number of MoS<sub>2</sub> layers, vertical and lateral nanosheet stacking configurations, and nanosheet widths. To enable more effective structural optimization, the resistance and capacitance components of the device are carefully segmented, providing a detailed framework for design refinements. The results indicate that a trilayer configuration outperforms its monolayer counterpart by reducing external resistance through an increased surface area, making it the preferred option at a 12 nm gate length. This observation also elucidates the advantage of single lateral stacking over double lateral stacking. While vertical stacking increases the effective width for on-current enhancement, excessive stacking compromises switching speed at the same power level, identifying four vertical stack structures as the optimal configuration. Among the evaluated configurations, the trilayer MoS<sub>2</sub> mNS-FET with four vertical stacks, single lateral stacking, and a 17 nm nanosheet width was identified as the optimal structure for the 0.7 nm node. Furthermore, at the circuit level, the effective width is evaluated to ensure compliance with the circuit area constraints of the target technology node. Analyzing the impact of parasitic resistance and capacitance in the Middle-of-Line (MOL) and Back-End-of-Line (BEOL) reveals that time delay can lead to up to a 58 % degradation in inverter circuit performance. By systematically investigating the impact of MoS<sub>2</sub>-based mNS-FET structures, this study provides critical insights to guide the future design of TMDC-based mNS-FETs.</div></div>\",\"PeriodicalId\":17219,\"journal\":{\"name\":\"Journal of Science: Advanced Materials and Devices\",\"volume\":\"10 3\",\"pages\":\"Article 100931\"},\"PeriodicalIF\":6.8000,\"publicationDate\":\"2025-06-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Science: Advanced Materials and Devices\",\"FirstCategoryId\":\"88\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S246821792500084X\",\"RegionNum\":3,\"RegionCategory\":\"材料科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"MATERIALS SCIENCE, MULTIDISCIPLINARY\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Science: Advanced Materials and Devices","FirstCategoryId":"88","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S246821792500084X","RegionNum":3,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"MATERIALS SCIENCE, MULTIDISCIPLINARY","Score":null,"Total":0}
Exploring optimal TMDC multi-channel GAA-FET architectures at sub-1nm nodes
This paper explores the design and optimization of multi-Nanosheet Field-Effect Transistors (mNS-FETs) employing a Transition Metal Dichalcogenide (TMDC) channel, specifically MoS2, for the 0.7 nm technology node using calibrated Technology Computer-Aided Design (TCAD) simulations. A comprehensive analysis is conducted at both the device and circuit levels, considering various structural parameters such as the number of MoS2 layers, vertical and lateral nanosheet stacking configurations, and nanosheet widths. To enable more effective structural optimization, the resistance and capacitance components of the device are carefully segmented, providing a detailed framework for design refinements. The results indicate that a trilayer configuration outperforms its monolayer counterpart by reducing external resistance through an increased surface area, making it the preferred option at a 12 nm gate length. This observation also elucidates the advantage of single lateral stacking over double lateral stacking. While vertical stacking increases the effective width for on-current enhancement, excessive stacking compromises switching speed at the same power level, identifying four vertical stack structures as the optimal configuration. Among the evaluated configurations, the trilayer MoS2 mNS-FET with four vertical stacks, single lateral stacking, and a 17 nm nanosheet width was identified as the optimal structure for the 0.7 nm node. Furthermore, at the circuit level, the effective width is evaluated to ensure compliance with the circuit area constraints of the target technology node. Analyzing the impact of parasitic resistance and capacitance in the Middle-of-Line (MOL) and Back-End-of-Line (BEOL) reveals that time delay can lead to up to a 58 % degradation in inverter circuit performance. By systematically investigating the impact of MoS2-based mNS-FET structures, this study provides critical insights to guide the future design of TMDC-based mNS-FETs.
期刊介绍:
In 1985, the Journal of Science was founded as a platform for publishing national and international research papers across various disciplines, including natural sciences, technology, social sciences, and humanities. Over the years, the journal has experienced remarkable growth in terms of quality, size, and scope. Today, it encompasses a diverse range of publications dedicated to academic research.
Considering the rapid expansion of materials science, we are pleased to introduce the Journal of Science: Advanced Materials and Devices. This new addition to our journal series offers researchers an exciting opportunity to publish their work on all aspects of materials science and technology within the esteemed Journal of Science.
With this development, we aim to revolutionize the way research in materials science is expressed and organized, further strengthening our commitment to promoting outstanding research across various scientific and technological fields.