Hardware architecture of efficient image dehazing technique for advanced driving assistance system

Advanced Driving Assistance Systems (ADAS) rely on clear visual input, making robust image dehazing essential for safety and reliability. This paper presents a low-complexity, hardware-efficient image dehazing solution based on the Dark Channel Prior (DCP). The proposed architecture includes three key modules: Approximate Transmission Map Estimation (TME), Atmospheric Light Estimation (ALE), and Scene Recovery Module (SRM). Each component is optimized for real-time processing and implemented in Verilog Hardware Description Language (HDL). The complete system is synthesized and validated on the Zynq 7000 series Field Programmable Gate Array (FPGA) platform. Furthermore, the design is synthesized using 45 nm Complementary Metal Oxide Semiconductor (CMOS) technology via Cadence Genus to evaluate actual chip-level parameters such as area, power consumption, and delay. Experimental results demonstrate that the proposed design achieves high image quality with improved Structural Similarity Index (SSIM), Peak Signal-to-Noise Ratio (PSNR), and lower Mean Square Error (MSE) compared to existing methods. Furthermore, the hardware architecture offers substantial efficiency gains, with Area-Delay Product (ADP) reductions ranging from 0.801 % to 91.16 %, and Power-Delay Product (PDP) reductions from 6.67 % to 93.56 % over prior works. These results indicate that the proposed solution is well-suited for integration in real-time embedded vision applications such as ADAS.