提高数模转换器的精度

Q4 Engineering

Measurement Sensors Pub Date : 2025-05-01 DOI:10.1016/j.measen.2024.101419

Jonathan Sæthre Ege , Bikash Adhikari , Ahmad Faza , Trond Ytterdal , Arnfinn A. Eielsen

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引用次数: 0

摘要

数模转换器（dac）的精度主要受到输出电压或电流水平的静态误差（称为元件失配）的限制。本文在一组候选集成电路（IC）设计上评估了五种减小误差的方法。目的是找到一种现实可行的IC设计和线性化方法的结合，该方法可以在100 kHz带宽下产生至少18个有效位数（ENOB），远高于目前最先进的基于半导体的dac，目前在10 kHz带宽下为17个ENOB。结果表明，五种方法中有三种提供了性能改进，数字校准的噪声整形接近预期目标。

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Improving the accuracy of digital-to-analogue converters

The precision of digital-to-analogue converters (DACs) is principally limited by static errors in the output voltage or current levels, known as element mismatch. This paper evaluates five error mitigation methods on a set of candidate integrated circuit (IC) designs. The aim is to find a combination of a realistic and implementable IC design and a linearisation method that can yield a minimum of 18 effective number of bits (ENOB) at a 100 kHz bandwidth, well above the current state-of-the-art of semiconductor-based DACs, which currently is 17 ENOB at a 10 kHz bandwidth. It is demonstrated that three out of five methods provide performance improvements, with noise-shaping with digital calibration approaching the desired target.

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