Semi-supervised dual-constraint centroid contrastive prototypical network for flip chip defect detection under limited labeled data

Flip chips are widely used in electronic systems for defense, aerospace, and other applications where packaging reliability is critical. However, flip chip defect samples present a variety of defect types and few samples with labels in actual industrial applications. The paucity of labeled defect samples indicates that the existing data volume cannot be matched with deep learning detection models. Therefore, flip chip intelligent defect detection faces the problems of poor model adaptability and weak generalization performance. As a solution to these problems, a semi-supervised dual-constraint centroid contrastive prototypical network (SSDCPN) for flip chip defect detection under limited labeled data is proposed in this paper. First, a prototype-based supervised contrastive learning strategy is developed to construct the contrastive prototypical network, which increases the inter-class sparsity and intra-class compactness of features to acquire more discriminative features. Then, to address the susceptibility of the support set prototypes to outliers, dual constraints are imposed on the support set prototypes to calibrate and refine the prototypes. Finally, a pseudo-labeled sample selection mechanism based on epistemic uncertainty and entropy is proposed to obtain rich semi-supervised information to guide the model training. The mechanism can select high-confidence pseudo-labeled samples that can complement the training samples to further strengthen the generalization performance of the model. Defect detection experiments on flip chip vibration signals indicate that the present method is superior to other methods in the case of limited labeled samples.