Pedro Henrique Aquino Barra;Ricardo Augusto Souza Fernandes;Denis Vinicius Coury
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The backup relays exhibited a minimum trip time of 230 ms and a median trip time of 299.6 ms, while the coordination time intervals remained within safe margins (50% of cases maintaining a margin of 246.7 ms), ensuring selectivity. Moreover, real-time hardware-in-the-loop (HIL) tests using TMSF28335 microcontrollers validated the scheme’s practical applicability, showing a strong correlation between simulated and experimental results. The mean difference between the simulated and experimental trip times was 29 ms, with maximum deviations below 7.2% (64 ms) and a minimum deviation of 5 ms. The results confirm the effectiveness of the proposed strategy in reducing tripping times while maintaining coordination, making it a promising solution for both islanded and grid-connected MG operating modes.","PeriodicalId":13079,"journal":{"name":"IEEE Access","volume":"13 ","pages":"76271-76288"},"PeriodicalIF":3.4000,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10979849","citationCount":"0","resultStr":"{\"title\":\"Adaptive Hybrid Tripping Microgrid Protection Strategy With Embedded Hardware Validation\",\"authors\":\"Pedro Henrique Aquino Barra;Ricardo Augusto Souza Fernandes;Denis Vinicius Coury\",\"doi\":\"10.1109/ACCESS.2025.3565226\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes an adaptive hybrid-tripping-based protection strategy for microgrids (MGs) that enables a fast and reliable response to faults by leveraging phase voltage and current measurements from relay locations. The protection coordination problem was addressed by optimizing the relay settings for different MG operating scenarios, ensuring proper coordination between the primary and backup relays. Comprehensive performance evaluation using PSCAD simulations demonstrated that the proposed protection scheme operates with 50% of faults cleared within 41.5 ms, while 90% of cases are cleared within 530.8 ms across various fault conditions in both grid-connected and islanded operating conditions. The backup relays exhibited a minimum trip time of 230 ms and a median trip time of 299.6 ms, while the coordination time intervals remained within safe margins (50% of cases maintaining a margin of 246.7 ms), ensuring selectivity. Moreover, real-time hardware-in-the-loop (HIL) tests using TMSF28335 microcontrollers validated the scheme’s practical applicability, showing a strong correlation between simulated and experimental results. The mean difference between the simulated and experimental trip times was 29 ms, with maximum deviations below 7.2% (64 ms) and a minimum deviation of 5 ms. The results confirm the effectiveness of the proposed strategy in reducing tripping times while maintaining coordination, making it a promising solution for both islanded and grid-connected MG operating modes.\",\"PeriodicalId\":13079,\"journal\":{\"name\":\"IEEE Access\",\"volume\":\"13 \",\"pages\":\"76271-76288\"},\"PeriodicalIF\":3.4000,\"publicationDate\":\"2025-04-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10979849\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Access\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10979849/\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"COMPUTER SCIENCE, INFORMATION SYSTEMS\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Access","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10979849/","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, INFORMATION SYSTEMS","Score":null,"Total":0}
Adaptive Hybrid Tripping Microgrid Protection Strategy With Embedded Hardware Validation
This paper proposes an adaptive hybrid-tripping-based protection strategy for microgrids (MGs) that enables a fast and reliable response to faults by leveraging phase voltage and current measurements from relay locations. The protection coordination problem was addressed by optimizing the relay settings for different MG operating scenarios, ensuring proper coordination between the primary and backup relays. Comprehensive performance evaluation using PSCAD simulations demonstrated that the proposed protection scheme operates with 50% of faults cleared within 41.5 ms, while 90% of cases are cleared within 530.8 ms across various fault conditions in both grid-connected and islanded operating conditions. The backup relays exhibited a minimum trip time of 230 ms and a median trip time of 299.6 ms, while the coordination time intervals remained within safe margins (50% of cases maintaining a margin of 246.7 ms), ensuring selectivity. Moreover, real-time hardware-in-the-loop (HIL) tests using TMSF28335 microcontrollers validated the scheme’s practical applicability, showing a strong correlation between simulated and experimental results. The mean difference between the simulated and experimental trip times was 29 ms, with maximum deviations below 7.2% (64 ms) and a minimum deviation of 5 ms. The results confirm the effectiveness of the proposed strategy in reducing tripping times while maintaining coordination, making it a promising solution for both islanded and grid-connected MG operating modes.
IEEE AccessCOMPUTER SCIENCE, INFORMATION SYSTEMSENGIN-ENGINEERING, ELECTRICAL & ELECTRONIC
CiteScore
9.80
自引率
7.70%
发文量
6673
审稿时长
6 weeks
期刊介绍:
IEEE Access® is a multidisciplinary, open access (OA), applications-oriented, all-electronic archival journal that continuously presents the results of original research or development across all of IEEE''s fields of interest.
IEEE Access will publish articles that are of high interest to readers, original, technically correct, and clearly presented. Supported by author publication charges (APC), its hallmarks are a rapid peer review and publication process with open access to all readers. Unlike IEEE''s traditional Transactions or Journals, reviews are "binary", in that reviewers will either Accept or Reject an article in the form it is submitted in order to achieve rapid turnaround. Especially encouraged are submissions on:
Multidisciplinary topics, or applications-oriented articles and negative results that do not fit within the scope of IEEE''s traditional journals.
Practical articles discussing new experiments or measurement techniques, interesting solutions to engineering.
Development of new or improved fabrication or manufacturing techniques.
Reviews or survey articles of new or evolving fields oriented to assist others in understanding the new area.