A survey on benchmarking and performance evaluation of SOGI based three-phase advanced PLLs with DC offset rejection capability

The Renewable Energy Sources (RESs) are integrated into the grid through power electronic converters in order to meet the increasing demand for electricity. To enable the best possible energy transfer between RESs and the grid, the grid interfacing converter's control mechanism ensures that the voltage and currents injected by RESs are in phase with the grid. Phase Locked Loops (PLLs), are widely employed in the estimation of synchronous data, such as phase angle and grid voltage amplitude. However, because of the presence of grid harmonics and Direct Current (DC) offset in the grid voltage that cause fundamental frequency oscillations, phase-locked deviation may arise from incorrectly extracting the fundamental voltage component. Other advanced PLLs are sought after due to the inefficiency of the frequently utilized Dual Second Order Generalized Integrator PLL (DSOGI PLL) and Synchronous Reference Frame PLL (SRF PLL) during the DC offsets for grid synchronization. The grid tied RESs synchronization in the DC offset case is still unachievable despite the Second Order Generalized Integrator (SOGI) filter based DSOGI PLL's excellent harmonic rejection capacity. This article provides an in-depth analysis of some advanced SOGI filter based PLL approaches to mitigate the DC offset problem in PLL algorithms. These techniques entail utilizing the advanced structures of the SOGI based filter to block the DC offset prior to the PLL input. These approaches' design features, stability analysis using Bode plots and a comprehensive performance study using MATLAB/Simulink is conducted highlighting their pros and cons to provide an accurate benchmark for the SOGI based PLLs.