Enhanced temperature stability of colossal-permittivity Ce-doped SrTiO3 ceramics designed by defect engineering

Cerium-doped SrTiO₃ ceramics (Sr_1-3x/2Ce_xTiO₃, x = 0, 0.005, 0.0075, 0.01, 0.0125, and 0.015) were prepared by a burying sintering process. The sample with x = 0.0075 exhibits a colossal permittivity (∼ 21,000) and ultra-low dielectric loss (∼ 0.0073) at room temperature (at 1 kHz). Furthermore, the x = 0.0075 sample maintains high permittivity (ε′ ≥ 15,000) and low dielectric loss (tanδ ≤ 0.018) in a wide temperature range (−60°C to 250°C). X-ray photoelectron spectroscopy and electron paramagnetic resonance indicate the coexistence of Ce³⁺ and Ti³⁺. According to equation $C=\frac{\epsilon A}{d}$, synergetic effects from defect dipoles and interfacial polarization are responsible for the observed high-performance giant permittivity behaviors with pronounced temperature stability and ultralow tanδ. The dielectric behaviors under different DC biases evidence the minor contribution from the interfacial polarization and reflect the dominant contribution from defect dipoles. The dielectric properties of dielectric ceramics are mainly influenced by oxygen vacancy clusters and defect dipoles ((Ti³⁺ − $V_O^{••}$ − Ti³⁺) and ($V_{\mathrm{Sr}}^{{}^{\prime \prime }}$ − $V_O^{••}$)). The excellent thermal stability of permittivity is also attributed to the pinning effect of defect dipoles from the charged defects which prohibit the long-range movement of free carries. The obtained colossal permittivity and low dielectric loss SrTiO₃-based ceramics with high-frequency/temperature stabilities are suitable for the application of single-layer ceramic capacitors.