x2DL: A high throughput architecture for binary-ring-learning-with-error-based post quantum cryptography schemes

Lattice-based cryptography is one of the most promising cryptographic scheme which lies on the hardness of ring-learning-with-error (RLWE). A new variant of RLWE, known as binary-ring-learning-with-error (BRLWE), has less key size and more efficient hardware implementations compared to RLWE-based schemes. The key arithmetic operation for BRLWE-based encryption scheme is the implementation of arithmetic operation represented by $FD+H$, where both $F$ and $H$ are integer polynomials, and $D$ is a binary polynomial. An efficient architecture to perform the arithmetic operation $FD+H$ over a polynomial ring $x^n+1$ is proposed. We employ two linear feedback shift register structures comprising $x^2$-net units in our design to reduce the computational time. This reduction in computational time yields to a significant improvement in the other performance metrics such as delay, area-delay product (ADP), power-delay product, throughput and efficiency compared to the existing designs. As per the experimental results, the authors’ proposed design has $32\%$ improvement in ADP when compared to the recently reported work.