{"title":"针对 VSC-HVDC 应用中混合式和模块式多电平转换器的高效精确的转换器半导体损耗数值分析计算","authors":"Levi Bieber;Liwei Wang;Juri Jatskevich","doi":"10.1109/OAJPE.2024.3449346","DOIUrl":null,"url":null,"abstract":"This paper outlines a method enabling the quick and accurate calculation of semiconductor conduction and switching losses of multilevel voltage-sourced converters. The proposed method needs only the equations defining the voltages and currents of the converter’s stacks of submodules and director switch valves to calculate the overall converter semiconductor losses, thereby accelerating the design cycle of novel converter topologies. For any defined operating point, the method quickly returns the semiconductor losses, making it straightforward to sweep across a converter’s range of operation, enabling quick comparison with other well-known, state-of-the-art converters. The method is derived for any generic multilevel converter, while examples of its application to the hybrid three-level converter, which is composed of both stacks and director switches, validate its accuracy. The method is further applied to the extended-overlap alternate-arm converter, also composed of stacks and director switches, providing further evidence of the method’s consistency. To validate the results, the semiconductor losses obtained from detailed simulations of a 600kV, 1GVA VSC-HVDC converter test system are compared against the proposed method, which demonstrate exceptional agreement. The relative errors in overall semiconductor losses between the simulation and the proposed method for the H3LC and EO-AAC are 0.76% and 0.94%, respectively.","PeriodicalId":56187,"journal":{"name":"IEEE Open Access Journal of Power and Energy","volume":null,"pages":null},"PeriodicalIF":3.3000,"publicationDate":"2024-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10646396","citationCount":"0","resultStr":"{\"title\":\"Numerically Efficient and Accurate Analytical Converter Semiconductor Loss Calculation for Hybrid and Modular Multilevel Converters in VSC-HVDC Applications\",\"authors\":\"Levi Bieber;Liwei Wang;Juri Jatskevich\",\"doi\":\"10.1109/OAJPE.2024.3449346\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper outlines a method enabling the quick and accurate calculation of semiconductor conduction and switching losses of multilevel voltage-sourced converters. The proposed method needs only the equations defining the voltages and currents of the converter’s stacks of submodules and director switch valves to calculate the overall converter semiconductor losses, thereby accelerating the design cycle of novel converter topologies. For any defined operating point, the method quickly returns the semiconductor losses, making it straightforward to sweep across a converter’s range of operation, enabling quick comparison with other well-known, state-of-the-art converters. The method is derived for any generic multilevel converter, while examples of its application to the hybrid three-level converter, which is composed of both stacks and director switches, validate its accuracy. The method is further applied to the extended-overlap alternate-arm converter, also composed of stacks and director switches, providing further evidence of the method’s consistency. To validate the results, the semiconductor losses obtained from detailed simulations of a 600kV, 1GVA VSC-HVDC converter test system are compared against the proposed method, which demonstrate exceptional agreement. The relative errors in overall semiconductor losses between the simulation and the proposed method for the H3LC and EO-AAC are 0.76% and 0.94%, respectively.\",\"PeriodicalId\":56187,\"journal\":{\"name\":\"IEEE Open Access Journal of Power and Energy\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":3.3000,\"publicationDate\":\"2024-08-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10646396\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Open Access Journal of Power and Energy\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10646396/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENERGY & FUELS\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Open Access Journal of Power and Energy","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10646396/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENERGY & FUELS","Score":null,"Total":0}
Numerically Efficient and Accurate Analytical Converter Semiconductor Loss Calculation for Hybrid and Modular Multilevel Converters in VSC-HVDC Applications
This paper outlines a method enabling the quick and accurate calculation of semiconductor conduction and switching losses of multilevel voltage-sourced converters. The proposed method needs only the equations defining the voltages and currents of the converter’s stacks of submodules and director switch valves to calculate the overall converter semiconductor losses, thereby accelerating the design cycle of novel converter topologies. For any defined operating point, the method quickly returns the semiconductor losses, making it straightforward to sweep across a converter’s range of operation, enabling quick comparison with other well-known, state-of-the-art converters. The method is derived for any generic multilevel converter, while examples of its application to the hybrid three-level converter, which is composed of both stacks and director switches, validate its accuracy. The method is further applied to the extended-overlap alternate-arm converter, also composed of stacks and director switches, providing further evidence of the method’s consistency. To validate the results, the semiconductor losses obtained from detailed simulations of a 600kV, 1GVA VSC-HVDC converter test system are compared against the proposed method, which demonstrate exceptional agreement. The relative errors in overall semiconductor losses between the simulation and the proposed method for the H3LC and EO-AAC are 0.76% and 0.94%, respectively.