{"title":"用于离网应用的减少开关多电平逆变器的故障恢复能力","authors":"Pavan Kumar Chillappagari, Karthick Nagaraj, Madhukar Rao Airineni","doi":"10.1007/s40998-024-00749-3","DOIUrl":null,"url":null,"abstract":"<p>In this article, reduced switch-based fault resilience capable multi-level inverter (MLI) with phase disposition pulse width modulation (PD-PWM) strategy is implemented. For reliable power conditioning and monitoring of PV based systems multi-level inverter (MLI) received a lot of attention. The switching device quantity mainly influences of volume and reliability in a MLIs. It is a crucial challenge in on and off-grid applications. Because of the high failure rate of power devices, the reliability of MLI utilized in PV and grid-connected systems is very poor or susceptible. To reduce the switching losses and enhance the MLIs reliability with fault resiliency, the reduced switch component topology is proposed in this work. Instead of a single switch, the suggested configuration is employed with multiple switch fault resiliency, then the reliability of the inverter is enhanced. Further, the PD-PWM switching strategy is employed for the MLI operation. The proposed scheme offers an excellent performance with significant result of THD, switching losses, and efficacy. The implemented inverter topology with PD-PWM strategy is simulated in MATLAB/Simulink along with fault tolerance operation under normal and faulty operation. Also, the real-time operation of proposed topology with experimental setup is validated using field programmable gate array (FPGA) controller.</p>","PeriodicalId":49064,"journal":{"name":"Iranian Journal of Science and Technology-Transactions of Electrical Engineering","volume":null,"pages":null},"PeriodicalIF":1.5000,"publicationDate":"2024-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fault Resilient Ability of Reduced Switches Multi Level Inverter for Off Grid Applications\",\"authors\":\"Pavan Kumar Chillappagari, Karthick Nagaraj, Madhukar Rao Airineni\",\"doi\":\"10.1007/s40998-024-00749-3\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>In this article, reduced switch-based fault resilience capable multi-level inverter (MLI) with phase disposition pulse width modulation (PD-PWM) strategy is implemented. For reliable power conditioning and monitoring of PV based systems multi-level inverter (MLI) received a lot of attention. The switching device quantity mainly influences of volume and reliability in a MLIs. It is a crucial challenge in on and off-grid applications. Because of the high failure rate of power devices, the reliability of MLI utilized in PV and grid-connected systems is very poor or susceptible. To reduce the switching losses and enhance the MLIs reliability with fault resiliency, the reduced switch component topology is proposed in this work. Instead of a single switch, the suggested configuration is employed with multiple switch fault resiliency, then the reliability of the inverter is enhanced. Further, the PD-PWM switching strategy is employed for the MLI operation. The proposed scheme offers an excellent performance with significant result of THD, switching losses, and efficacy. The implemented inverter topology with PD-PWM strategy is simulated in MATLAB/Simulink along with fault tolerance operation under normal and faulty operation. Also, the real-time operation of proposed topology with experimental setup is validated using field programmable gate array (FPGA) controller.</p>\",\"PeriodicalId\":49064,\"journal\":{\"name\":\"Iranian Journal of Science and Technology-Transactions of Electrical Engineering\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":1.5000,\"publicationDate\":\"2024-09-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Iranian Journal of Science and Technology-Transactions of Electrical Engineering\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1007/s40998-024-00749-3\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Iranian Journal of Science and Technology-Transactions of Electrical Engineering","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1007/s40998-024-00749-3","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Fault Resilient Ability of Reduced Switches Multi Level Inverter for Off Grid Applications
In this article, reduced switch-based fault resilience capable multi-level inverter (MLI) with phase disposition pulse width modulation (PD-PWM) strategy is implemented. For reliable power conditioning and monitoring of PV based systems multi-level inverter (MLI) received a lot of attention. The switching device quantity mainly influences of volume and reliability in a MLIs. It is a crucial challenge in on and off-grid applications. Because of the high failure rate of power devices, the reliability of MLI utilized in PV and grid-connected systems is very poor or susceptible. To reduce the switching losses and enhance the MLIs reliability with fault resiliency, the reduced switch component topology is proposed in this work. Instead of a single switch, the suggested configuration is employed with multiple switch fault resiliency, then the reliability of the inverter is enhanced. Further, the PD-PWM switching strategy is employed for the MLI operation. The proposed scheme offers an excellent performance with significant result of THD, switching losses, and efficacy. The implemented inverter topology with PD-PWM strategy is simulated in MATLAB/Simulink along with fault tolerance operation under normal and faulty operation. Also, the real-time operation of proposed topology with experimental setup is validated using field programmable gate array (FPGA) controller.
期刊介绍:
Transactions of Electrical Engineering is to foster the growth of scientific research in all branches of electrical engineering and its related grounds and to provide a medium by means of which the fruits of these researches may be brought to the attentionof the world’s scientific communities.
The journal has the focus on the frontier topics in the theoretical, mathematical, numerical, experimental and scientific developments in electrical engineering as well
as applications of established techniques to new domains in various electical engineering disciplines such as:
Bio electric, Bio mechanics, Bio instrument, Microwaves, Wave Propagation, Communication Theory, Channel Estimation, radar & sonar system, Signal Processing, image processing, Artificial Neural Networks, Data Mining and Machine Learning, Fuzzy Logic and Systems, Fuzzy Control, Optimal & Robust ControlNavigation & Estimation Theory, Power Electronics & Drives, Power Generation & Management The editors will welcome papers from all professors and researchers from universities, research centers,
organizations, companies and industries from all over the world in the hope that this will advance the scientific standards of the journal and provide a channel of communication between Iranian Scholars and their colleague in other parts of the world.