An energy and information analysis method of logic gates based on stochastic thermodynamics

To reduce the energy consumption of logic gates in digital circuits, the size of transistors approaches the mesoscopic scale, e.g., sub-7 nanometers (nm). However, existing energy consumption analysis methods exhibit various deviation for logic gates when the non-equilibrium information processing of mesoscopic scale transistors with ultra-low voltages is analyzed. Based on the stochastic thermodynamics theory, an information energy ratio method is proposed for the energy consumption estimation of XOR gates composed of mesoscopic scale transistors. The proposed method provides a new insight to quantify the transformation between the information capacity and energy consumption for XOR gates and extending to other logic gates. Utilizing the proposed analysis method, the supply voltage of the parity check circuit can be optimized by numerical simulations without expensive and complex practical measurements. The information energy ratio is the first analytical method to quantify the energy and information transformation of logic gates at the mesoscopic scale.