基于光逻辑门的二进制加法器、减法器和奇偶校验器

Q4 Engineering

International Journal of High Speed Electronics and Systems Pub Date : 2024-07-17 DOI:10.1142/s0129156424400573

Shunyao Fan, Niloy K. Dutta

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引用次数: 0

摘要

我们提出了使用光逻辑门的二进制加法器、减法器和奇偶校验器方案。这些方案可用于使用光学系统的计算。利用光逻辑门，我们可以实现高速光信号的二进制加法器、减法器和奇偶校验器功能。由于润湿层中的双光子吸收，量子点半导体光放大器马赫-泽恩德干涉仪（QD-SOA-MZI）可以作为高数据速率光逻辑门工作。仿真结果支持了在高光信号速率下实现全光二进制加法器、减法器和奇偶校验器的想法。

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Binary Adder, Subtractor and Parity Checker Based on Optical Logic Gates

We propose schemes for binary adder, subtractor and parity checker using optical logic gates. These schemes could be useful for calculations using optical systems. Utilizing optical logic gates, we can achieve functions of binary adder, subtractor and parity checker of high-speed optical signals. Due to two-photon absorption in the wetting layer, quantum dot-semiconductor optical amplifier Mach-Zehnder interferometer (QD-SOA-MZI) can work as high data rate optical logic gates. The simulated result supports the idea that it is possible to realize all-optical binary adder, subtractor and parity checker at high optical signal rates.

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来源期刊

International Journal of High Speed Electronics and Systems Engineering-Electrical and Electronic Engineering

CiteScore

0.60

自引率

0.00%

发文量

期刊介绍： Launched in 1990, the International Journal of High Speed Electronics and Systems (IJHSES) has served graduate students and those in R&D, managerial and marketing positions by giving state-of-the-art data, and the latest research trends. Its main charter is to promote engineering education by advancing interdisciplinary science between electronics and systems and to explore high speed technology in photonics and electronics. IJHSES, a quarterly journal, continues to feature a broad coverage of topics relating to high speed or high performance devices, circuits and systems.