{"title":"基于高带宽 FPGA 的随机电压状态,用于控制 QKD 系统中的光电器件。","authors":"Aman Satija, Dustin Cruise, Vaibhav Garg","doi":"10.1088/2631-8695/ad6833","DOIUrl":null,"url":null,"abstract":"\n We have developed an inexpensive system for generating random voltage states (RVS) on a FPGA platform. This system can be used for controlling optoelectronic devices in a quantum-key-distribution (QKD) system. We use an all-digital operation at the FPGA layer to generate two uncorrelated Boolean bit strings. These bit strings are converted to RVS using a multiplexer and a voltage buffer in order to drive commercially available optoelectronic devices. A National Instruments (N.I) real-time IO (RIO) platform was used for FPGA implementation. The FPGA layer was coupled to the desktop layer for real-time monitoring and logging of the Boolean bit strings. We characterize the performance of the multiplexer and the buffer and describe how their engineering performance trades-off with the fidelity of RVS generation.","PeriodicalId":505725,"journal":{"name":"Engineering Research Express","volume":"59 40","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High-bandwidth FPGA based randomized voltage states for controlling optoelectronic devices in QKD systems.\",\"authors\":\"Aman Satija, Dustin Cruise, Vaibhav Garg\",\"doi\":\"10.1088/2631-8695/ad6833\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\n We have developed an inexpensive system for generating random voltage states (RVS) on a FPGA platform. This system can be used for controlling optoelectronic devices in a quantum-key-distribution (QKD) system. We use an all-digital operation at the FPGA layer to generate two uncorrelated Boolean bit strings. These bit strings are converted to RVS using a multiplexer and a voltage buffer in order to drive commercially available optoelectronic devices. A National Instruments (N.I) real-time IO (RIO) platform was used for FPGA implementation. The FPGA layer was coupled to the desktop layer for real-time monitoring and logging of the Boolean bit strings. We characterize the performance of the multiplexer and the buffer and describe how their engineering performance trades-off with the fidelity of RVS generation.\",\"PeriodicalId\":505725,\"journal\":{\"name\":\"Engineering Research Express\",\"volume\":\"59 40\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-07-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Engineering Research Express\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1088/2631-8695/ad6833\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Engineering Research Express","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1088/2631-8695/ad6833","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-bandwidth FPGA based randomized voltage states for controlling optoelectronic devices in QKD systems.
We have developed an inexpensive system for generating random voltage states (RVS) on a FPGA platform. This system can be used for controlling optoelectronic devices in a quantum-key-distribution (QKD) system. We use an all-digital operation at the FPGA layer to generate two uncorrelated Boolean bit strings. These bit strings are converted to RVS using a multiplexer and a voltage buffer in order to drive commercially available optoelectronic devices. A National Instruments (N.I) real-time IO (RIO) platform was used for FPGA implementation. The FPGA layer was coupled to the desktop layer for real-time monitoring and logging of the Boolean bit strings. We characterize the performance of the multiplexer and the buffer and describe how their engineering performance trades-off with the fidelity of RVS generation.