{"title":"BFV 同态加密方案的加密/解密架构设计与实现","authors":"Vaddi Hari Chandana","doi":"10.22214/ijraset.2024.63724","DOIUrl":null,"url":null,"abstract":"Abstract: Now a days security is the prime part for both, the satellites communication of the electronics data and the stored data, hence encryption is important for information processing system and communication network. The proposed approach is easy to learn due the use of speed efficient Vedic multiplier. Since it minimizes the execution time and area, so the delay and power consumption is further decrease by the compact and flexible approach in the Mix column transform which takes different approach rather than conventional multiplication previously. The structure style of modeling helps to easy understandable the proposed design of algorithm. BFV is the symmetrical has designed and verified in the Verilog HDL in Xilinx tool. In this project we present using kogge-stone adder and Vedic multiplier.","PeriodicalId":13718,"journal":{"name":"International Journal for Research in Applied Science and Engineering Technology","volume":"27 9","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and Implementation of Encryption/ Decryption Architectures for BFV Homomorphic Encryption Scheme\",\"authors\":\"Vaddi Hari Chandana\",\"doi\":\"10.22214/ijraset.2024.63724\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Abstract: Now a days security is the prime part for both, the satellites communication of the electronics data and the stored data, hence encryption is important for information processing system and communication network. The proposed approach is easy to learn due the use of speed efficient Vedic multiplier. Since it minimizes the execution time and area, so the delay and power consumption is further decrease by the compact and flexible approach in the Mix column transform which takes different approach rather than conventional multiplication previously. The structure style of modeling helps to easy understandable the proposed design of algorithm. BFV is the symmetrical has designed and verified in the Verilog HDL in Xilinx tool. In this project we present using kogge-stone adder and Vedic multiplier.\",\"PeriodicalId\":13718,\"journal\":{\"name\":\"International Journal for Research in Applied Science and Engineering Technology\",\"volume\":\"27 9\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-07-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Journal for Research in Applied Science and Engineering Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.22214/ijraset.2024.63724\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal for Research in Applied Science and Engineering Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.22214/ijraset.2024.63724","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and Implementation of Encryption/ Decryption Architectures for BFV Homomorphic Encryption Scheme
Abstract: Now a days security is the prime part for both, the satellites communication of the electronics data and the stored data, hence encryption is important for information processing system and communication network. The proposed approach is easy to learn due the use of speed efficient Vedic multiplier. Since it minimizes the execution time and area, so the delay and power consumption is further decrease by the compact and flexible approach in the Mix column transform which takes different approach rather than conventional multiplication previously. The structure style of modeling helps to easy understandable the proposed design of algorithm. BFV is the symmetrical has designed and verified in the Verilog HDL in Xilinx tool. In this project we present using kogge-stone adder and Vedic multiplier.