Multi-mem behavior at reduced voltages in La1/2Sr1/2Mn1/2Co1/2O3−x perovskite modified with Sm:CeO2

The use of machine learning algorithms is exponentially growing and concerns are being raised about their sustainability. Neuromorphic computing aims to mimic the architecture and the information processing mechanisms of the mammalian brain, appearing as the only avenue that offers significant energy savings compared to the standard digital computers. Memcapacitive devices, which can change their capacitance between different nonvolatile states upon the application of electrical stimulation, can significantly reduce the energy consumption of bio-inspired circuitry. In the present work, we study the multi-mem (memristive and memcapacitive) behavior of devices based on thin films of the topotactic redox $\mathrm{L}{\mathrm{a}}_{1/2}\mathrm{S}{\mathrm{r}}_{1/2}\mathrm{M}{\mathrm{n}}_{1/2}\mathrm{C}{\mathrm{o}}_{1/2}{\mathrm{O}}_{3-x}$ (LSMCO) perovskite modified with Sm:$\mathrm{Ce}{\mathrm{O}}_2$ (SCO), grown on Nb:${\mathrm{SrTiO}}_3$ with (001) and (110) out-of-plane orientations. Either the self-assembling at the nanoscale of both LSMCO and SCO phases or the doping with Ce(Sm) of the LSMCO perovskite were observed for different fabrication conditions and out-of-plane orientations. The impact of these changes on the device electrical behavior was determined. The optimum devices resulted those with (110) orientation and Ce(Sm) doping the perovskite. These devices displayed a multi-mem behavior with robust memcapacitance and significantly lower operation voltages (especially the reset voltage) in comparison with devices based on pristine LSMCO. In addition, they were able to endure electrical cycling—and the concomitant perovskite topotactic redox transition between oxidized and reduced phases—without suffering nanostructural changes nor cationic segregation. We link these properties to an enhanced perovskite reducibility upon Ce(Sm) doping. Our work contributes to increasing the reliability of LSMCO-based multi-mem systems and to reducing their operating voltages closer to the 1 V threshold, which are key issues for the development of nanodevices for neuromorphic or in-memory computing.