设计和制造具有高失效电流和保持电压的双栅 DDSCR

Q1 Engineering
Xingtao Bao;Yang Wang;Yujie Liu;Xiangliang Jin
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引用次数: 0

摘要

高压控制器局域网(CAN)总线的工作环境恶劣,需要稳健的静电放电(ESD)设计窗口。因此,普通的硅控整流器 (SCR) 器件无法满足这些设计要求。为了简化可控硅的设计和制造,本研究提出了一种具有高失效电流和保持电压的新型双栅极双向可控硅(DG-DDSCR)。首先,在阳极和阴极的 N+和 P+中间区域引入了四个多晶硅栅极:GateA1、GateA2、GateC1 和 GateC2。当电压作用于阳极时,多晶硅栅极产生的电场加强了 SCR 电流路径,同时促进了基底路径中 ESD 电流的释放。具体来说,DG-DDSCR 的保持电压和从传输线脉冲(TLP)测试结果中得出的失效电流分别为 29.4 V 和 16.7 A。当箝位电压为 40 V 时,结构的瞬态电流释放量可达 11.61 A,符合 CAN 总线 ESD 窗口的规格要求,适合目标应用的 ESD 保护。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design and Manufacture of Dual-Gate DDSCR with High Failure Current and Holding Voltage
High-voltage controller area network (CAN) buses have a harsh working environment and require a robust electrostatic discharge (ESD) design window. Thus, ordinary silicon-controlled rectifier (SCR) devices do not satisfy these design requirements. To streamline the design and manufacturing of SCRs, this study proposes a novel dual-gate dual-direction SCR (DG-DDSCR) with a high failure current and holding voltage. First, four polysilicon gates, Gate A1 , Gate A2 , Gate C1 , and Gate C2 , were introduced to the N+ and P+ middle regions of the anode and cathode. When the voltage acts on the anode, the electric field generated by the polysilicon gate strengthens the SCR current path while promoting the release of ESD current in the substrate path. Specifically, the holding voltage of the DG-DDSCR and failure current derived from the test results of a transmission line pulse (TLP) are 29.4 V and 16.7 A, respectively. When the clamping voltage was 40 V, the transient current release of the structure can reach 11.61 A, which met the specifications of the CAN bus ESD window and was suitable for the ESD protection of the target application.
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来源期刊
Chinese Journal of Electrical Engineering
Chinese Journal of Electrical Engineering Energy-Energy Engineering and Power Technology
CiteScore
7.80
自引率
0.00%
发文量
621
审稿时长
12 weeks
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