用于 Memristor 集成神经形态电路的多功能 CMOS 模拟 LIF 神经元

Nikhil Garg, Davide Florini, Patrick Dufour, Eloir Muhr, Mathieu Faye, Marc Bocquet, Damien Querlioz, Yann Beilliard, Dominique Drouin, Fabien Alibart, Jean-Michel Portal
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引用次数: 0

摘要

异构系统中的模拟 CMOS 电路集成了纳米级阻尼器件,从而能够在神经形态硬件上高效部署神经网络。CMOS 神经元占用空间小,能以极低的电流水平模拟缓慢的时间动力学。然而,从记忆突触读取的电流可能会高出几个数量级,因此必须在神经元和突触之间进行阻抗匹配。在本文中,我们实现了一个带有电压调节器和电流衰减器的模拟漏电积分与发射(LIF)神经元,用于连接 CMOS 神经元与记忆性突触。此外,该神经元的设计还提出了双重泄漏,可以实现局部学习规则,如电压依赖性突触可塑性。我们还提出了一种连接方案,以实现基于双神经元交互的自适应 LIF 神经元。所提出的电路可用于连接各种突触设备和处理不同时间动态的信号。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits
Heterogeneous systems with analog CMOS circuits integrated with nanoscale memristive devices enable efficient deployment of neural networks on neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal dynamics by operating with extremely low current levels. Nevertheless, the current read from the memristive synapses can be higher by several orders of magnitude, and performing impedance matching between neurons and synapses is mandatory. In this paper, we implement an analog leaky integrate and fire (LIF) neuron with a voltage regulator and current attenuator for interfacing CMOS neurons with memristive synapses. In addition, the neuron design proposes a dual leakage that could enable the implementation of local learning rules such as voltage-dependent synaptic plasticity. We also propose a connection scheme to implement adaptive LIF neurons based on two-neuron interaction. The proposed circuits can be used to interface with a variety of synaptic devices and process signals of diverse temporal dynamics.
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