{"title":"用于 Memristor 集成神经形态电路的多功能 CMOS 模拟 LIF 神经元","authors":"Nikhil Garg, Davide Florini, Patrick Dufour, Eloir Muhr, Mathieu Faye, Marc Bocquet, Damien Querlioz, Yann Beilliard, Dominique Drouin, Fabien Alibart, Jean-Michel Portal","doi":"arxiv-2406.19667","DOIUrl":null,"url":null,"abstract":"Heterogeneous systems with analog CMOS circuits integrated with nanoscale\nmemristive devices enable efficient deployment of neural networks on\nneuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal\ndynamics by operating with extremely low current levels. Nevertheless, the\ncurrent read from the memristive synapses can be higher by several orders of\nmagnitude, and performing impedance matching between neurons and synapses is\nmandatory. In this paper, we implement an analog leaky integrate and fire (LIF)\nneuron with a voltage regulator and current attenuator for interfacing CMOS\nneurons with memristive synapses. In addition, the neuron design proposes a\ndual leakage that could enable the implementation of local learning rules such\nas voltage-dependent synaptic plasticity. We also propose a connection scheme\nto implement adaptive LIF neurons based on two-neuron interaction. The proposed\ncircuits can be used to interface with a variety of synaptic devices and\nprocess signals of diverse temporal dynamics.","PeriodicalId":501168,"journal":{"name":"arXiv - CS - Emerging Technologies","volume":"2 1","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits\",\"authors\":\"Nikhil Garg, Davide Florini, Patrick Dufour, Eloir Muhr, Mathieu Faye, Marc Bocquet, Damien Querlioz, Yann Beilliard, Dominique Drouin, Fabien Alibart, Jean-Michel Portal\",\"doi\":\"arxiv-2406.19667\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Heterogeneous systems with analog CMOS circuits integrated with nanoscale\\nmemristive devices enable efficient deployment of neural networks on\\nneuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal\\ndynamics by operating with extremely low current levels. Nevertheless, the\\ncurrent read from the memristive synapses can be higher by several orders of\\nmagnitude, and performing impedance matching between neurons and synapses is\\nmandatory. In this paper, we implement an analog leaky integrate and fire (LIF)\\nneuron with a voltage regulator and current attenuator for interfacing CMOS\\nneurons with memristive synapses. In addition, the neuron design proposes a\\ndual leakage that could enable the implementation of local learning rules such\\nas voltage-dependent synaptic plasticity. We also propose a connection scheme\\nto implement adaptive LIF neurons based on two-neuron interaction. The proposed\\ncircuits can be used to interface with a variety of synaptic devices and\\nprocess signals of diverse temporal dynamics.\",\"PeriodicalId\":501168,\"journal\":{\"name\":\"arXiv - CS - Emerging Technologies\",\"volume\":\"2 1\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-06-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"arXiv - CS - Emerging Technologies\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/arxiv-2406.19667\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"arXiv - CS - Emerging Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/arxiv-2406.19667","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits
Heterogeneous systems with analog CMOS circuits integrated with nanoscale
memristive devices enable efficient deployment of neural networks on
neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal
dynamics by operating with extremely low current levels. Nevertheless, the
current read from the memristive synapses can be higher by several orders of
magnitude, and performing impedance matching between neurons and synapses is
mandatory. In this paper, we implement an analog leaky integrate and fire (LIF)
neuron with a voltage regulator and current attenuator for interfacing CMOS
neurons with memristive synapses. In addition, the neuron design proposes a
dual leakage that could enable the implementation of local learning rules such
as voltage-dependent synaptic plasticity. We also propose a connection scheme
to implement adaptive LIF neurons based on two-neuron interaction. The proposed
circuits can be used to interface with a variety of synaptic devices and
process signals of diverse temporal dynamics.