Cascaded multiplier-free implementation of adaptive anti-jamming filter based on GNSS receiver

Evaluating the computational complexity is critical for assessing the time-domain anti-jamming performance of GNSS receivers. The multiplier is the core component that contributes to the computational complexity in time-domain anti-jamming. However, current algorithms aimed at reducing the complexity of time-domain anti-jamming typically concentrate on shortening the filter length, which fails to address the high computational complexity introduced by the use of multipliers. This paper introduces a cascaded multiplier-free approach for implementing time-domain anti-jamming in navigation receivers. We propose a numerical power decomposition technique based on optimal Canonical Signed Digit coding and coefficient decomposition. By substituting the multiplier with minimal adder and shift operations, the computational complexity of the anti-jamming filter with a high quantization bit-width can be considerably decreased. An optimization strategy is presented, and the low-complexity multiplier-free technique is applied to the time-domain anti-jamming filter. Compared to the traditional Canonical Signed Digit multiplier-free technique, our method can reduce the components required for a 12-bit quantization anti-interference filter by one adder, 20 shift operations, and five coded word lengths, while maintaining a pseudo-range measurement deviation below 0.27 ns.