设计具有低噪声和高 PSRR 的 LDO 电路

Xiao Li, Shengming Huang, Yingying Yao
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引用次数: 0

摘要

电源抑制比(PSRR)和噪声是低压差线性稳压器(LDO)的重要参数,被广泛应用于音频电路中。为了实现高 PSRR 和低噪声,本文设计的 LDO 电路中引入了 PSRR 增强电路和滤波电路。本文设计的 LDO 电路采用 MGN 0.35um 工艺实现。通过 Cadence 工具对电路的仿真分析表明,LDO 电路的 PSRR 在低频时为 -79dB,优于高频时的 -60dB。1KHz 时的输出噪声为 0.395 uv/ √Hz,10Hz~100KHz 频率范围内的噪声低至 32.5uVRMS。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of LDO circuit with low noise and high PSRR
Power supply rejection ratio (PSRR) and noise are important parameters of low voltage difference linear regulators (LDO), which are widely used in audio circuits. In order to achieve high PSRR and low noise, PSRR enhancement circuit and filter circuit are introduced in the LDO circuit designed in this paper. The LDO circuit designed in this paper is realized by MGN 0.35um process. The simulation analysis of the circuit by Cadence tool shows that the PSRR of the LDO circuit is -79dB at low frequency, which is better than -60dB at high frequency. The output noise is 0.395 uv/ √Hz at 1KHz, and the noise in the frequency range of 10Hz~100 KHz is as low as 32.5uVRMS.
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