利用新型和发生器设计面积效率高的高性能加法器

{"title":"利用新型和发生器设计面积效率高的高性能加法器","authors":"Niyas Ahamed Allavudeen, M. Muthusamy, Anand Karuppannan, Nazrin Salma Sheriff","doi":"10.1007/s00034-024-02724-z","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":504122,"journal":{"name":"Circuits, Systems, and Signal Processing","volume":" 32","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of an Area Efficient and High-Performance Adder with a Novel Sum Generator\",\"authors\":\"Niyas Ahamed Allavudeen, M. Muthusamy, Anand Karuppannan, Nazrin Salma Sheriff\",\"doi\":\"10.1007/s00034-024-02724-z\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\",\"PeriodicalId\":504122,\"journal\":{\"name\":\"Circuits, Systems, and Signal Processing\",\"volume\":\" 32\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Circuits, Systems, and Signal Processing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1007/s00034-024-02724-z\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Circuits, Systems, and Signal Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/s00034-024-02724-z","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}