{"title":"针对即将到来的 5 纳米以下技术节点,采用 NEGF 方法对无结型圆柱栅极全周硅纳米线 MOSFET 的双金属栅极工作函数工程进行直流和模拟/射频性能评估","authors":"Sanjay, Vibhor Kumar, Anil Vohra","doi":"10.1007/s12541-024-01023-6","DOIUrl":null,"url":null,"abstract":"<p>Present work investigates the DC and Analog/RF characteristics such as the drain current <span>\\(({I}_{D}\\)</span>), Transconductance <span>\\({(g}_{m})\\)</span>, Transconductance Generation Factor (TGF), Cut-off frequency <span>\\({(f}_{T})\\)</span>, Frequency Transconductance Product (FTP), Transit time <span>\\((\\tau ),\\)</span> and the total resistance of the source region, drain region, and channel resistance <span>\\({(R}_{SD+CH})\\)</span> for Dual Metal (DM) Inversion Mode (IM) and Junctionless (JL) Cylindrical Gate All Around (CGAA) Silicon nanowire (SiNW) MOSFETs with 5 nm gate length using Silvaco ATLAS 3D TCAD. In this work, the Non-Equilibrium Green’s Function approach along with the self-consistent solution of Schrödinger’s equation and Poisson’s equation has been considered. The channel is taken to be lightly doped in the case of IM DM CGAA SiNW type of device. The effect of DM Gate work function engineering for SiNW channel of diameter 3 nm with gate oxide <span>\\(({SiO}_{2})\\)</span> the thickness of 0.8 nm on <span>\\({I}_{D}\\)</span>,<span>\\({ g}_{m}\\)</span>, TGF, <span>\\({f}_{T}\\)</span>, <span>\\(\\tau\\)</span>, FTP and <span>\\({R}_{CH}\\)</span> has been studied. Moreover, a comparative study has been made between IMDM and JLDM CGAA SiNW devices with the above-mentioned parameters. For the JL device, the optimization of doping concentration is performed to get the same (i) I<sub>ON</sub> current and (ii) threshold voltage (V<sub>TH</sub>) as the IM device. About 3.09 times and 21.89 times reduction in I<sub>OFF</sub> is seen for the same I<sub>ON</sub> and V<sub>TH</sub> optimized devices respectively as compared to IM device. It has been found that DM Gate variation minimizes drain-induced barrier lowering (DIBL) in IM and JL devices. The JL SiNW showed much lower DIBL ~ 16.46 mV/V, a near ideal SS ~ 60 mV/dec, and higher <span>\\({I}_{ON}/{I}_{OFF}\\)</span> current ratio ~ 7.04 × 10<sup>8</sup> which is much better as compared to those reported in the literature for cylindrical gate all around (CGAA) devices. Also, it is found that the JL SiNW device performs better than IM in terms of SS, DIBL, <span>\\({I}_{ON}/{I}_{OFF}\\)</span>, <span>\\({g}_{m},\\)</span> TGF, f<sub>T</sub>, <span>\\(\\tau\\)</span>, FTP and <span>\\({R}_{SD+CH}\\)</span>.</p>","PeriodicalId":14359,"journal":{"name":"International Journal of Precision Engineering and Manufacturing","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"DC and Analog/RF Performance Evaluation Using Dual Metal Gate Work Function Engineering of Junctionless Cylindrical Gate All Around Si Nanowire MOSFET Using NEGF Approach for Upcoming Sub 5 nm Technology Node\",\"authors\":\"Sanjay, Vibhor Kumar, Anil Vohra\",\"doi\":\"10.1007/s12541-024-01023-6\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>Present work investigates the DC and Analog/RF characteristics such as the drain current <span>\\\\(({I}_{D}\\\\)</span>), Transconductance <span>\\\\({(g}_{m})\\\\)</span>, Transconductance Generation Factor (TGF), Cut-off frequency <span>\\\\({(f}_{T})\\\\)</span>, Frequency Transconductance Product (FTP), Transit time <span>\\\\((\\\\tau ),\\\\)</span> and the total resistance of the source region, drain region, and channel resistance <span>\\\\({(R}_{SD+CH})\\\\)</span> for Dual Metal (DM) Inversion Mode (IM) and Junctionless (JL) Cylindrical Gate All Around (CGAA) Silicon nanowire (SiNW) MOSFETs with 5 nm gate length using Silvaco ATLAS 3D TCAD. In this work, the Non-Equilibrium Green’s Function approach along with the self-consistent solution of Schrödinger’s equation and Poisson’s equation has been considered. The channel is taken to be lightly doped in the case of IM DM CGAA SiNW type of device. The effect of DM Gate work function engineering for SiNW channel of diameter 3 nm with gate oxide <span>\\\\(({SiO}_{2})\\\\)</span> the thickness of 0.8 nm on <span>\\\\({I}_{D}\\\\)</span>,<span>\\\\({ g}_{m}\\\\)</span>, TGF, <span>\\\\({f}_{T}\\\\)</span>, <span>\\\\(\\\\tau\\\\)</span>, FTP and <span>\\\\({R}_{CH}\\\\)</span> has been studied. Moreover, a comparative study has been made between IMDM and JLDM CGAA SiNW devices with the above-mentioned parameters. For the JL device, the optimization of doping concentration is performed to get the same (i) I<sub>ON</sub> current and (ii) threshold voltage (V<sub>TH</sub>) as the IM device. About 3.09 times and 21.89 times reduction in I<sub>OFF</sub> is seen for the same I<sub>ON</sub> and V<sub>TH</sub> optimized devices respectively as compared to IM device. It has been found that DM Gate variation minimizes drain-induced barrier lowering (DIBL) in IM and JL devices. The JL SiNW showed much lower DIBL ~ 16.46 mV/V, a near ideal SS ~ 60 mV/dec, and higher <span>\\\\({I}_{ON}/{I}_{OFF}\\\\)</span> current ratio ~ 7.04 × 10<sup>8</sup> which is much better as compared to those reported in the literature for cylindrical gate all around (CGAA) devices. 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DC and Analog/RF Performance Evaluation Using Dual Metal Gate Work Function Engineering of Junctionless Cylindrical Gate All Around Si Nanowire MOSFET Using NEGF Approach for Upcoming Sub 5 nm Technology Node
Present work investigates the DC and Analog/RF characteristics such as the drain current \(({I}_{D}\)), Transconductance \({(g}_{m})\), Transconductance Generation Factor (TGF), Cut-off frequency \({(f}_{T})\), Frequency Transconductance Product (FTP), Transit time \((\tau ),\) and the total resistance of the source region, drain region, and channel resistance \({(R}_{SD+CH})\) for Dual Metal (DM) Inversion Mode (IM) and Junctionless (JL) Cylindrical Gate All Around (CGAA) Silicon nanowire (SiNW) MOSFETs with 5 nm gate length using Silvaco ATLAS 3D TCAD. In this work, the Non-Equilibrium Green’s Function approach along with the self-consistent solution of Schrödinger’s equation and Poisson’s equation has been considered. The channel is taken to be lightly doped in the case of IM DM CGAA SiNW type of device. The effect of DM Gate work function engineering for SiNW channel of diameter 3 nm with gate oxide \(({SiO}_{2})\) the thickness of 0.8 nm on \({I}_{D}\),\({ g}_{m}\), TGF, \({f}_{T}\), \(\tau\), FTP and \({R}_{CH}\) has been studied. Moreover, a comparative study has been made between IMDM and JLDM CGAA SiNW devices with the above-mentioned parameters. For the JL device, the optimization of doping concentration is performed to get the same (i) ION current and (ii) threshold voltage (VTH) as the IM device. About 3.09 times and 21.89 times reduction in IOFF is seen for the same ION and VTH optimized devices respectively as compared to IM device. It has been found that DM Gate variation minimizes drain-induced barrier lowering (DIBL) in IM and JL devices. The JL SiNW showed much lower DIBL ~ 16.46 mV/V, a near ideal SS ~ 60 mV/dec, and higher \({I}_{ON}/{I}_{OFF}\) current ratio ~ 7.04 × 108 which is much better as compared to those reported in the literature for cylindrical gate all around (CGAA) devices. Also, it is found that the JL SiNW device performs better than IM in terms of SS, DIBL, \({I}_{ON}/{I}_{OFF}\), \({g}_{m},\) TGF, fT, \(\tau\), FTP and \({R}_{SD+CH}\).
期刊介绍:
The International Journal of Precision Engineering and Manufacturing accepts original contributions on all aspects of precision engineering and manufacturing. The journal specific focus areas include, but are not limited to:
- Precision Machining Processes
- Manufacturing Systems
- Robotics and Automation
- Machine Tools
- Design and Materials
- Biomechanical Engineering
- Nano/Micro Technology
- Rapid Prototyping and Manufacturing
- Measurements and Control
Surveys and reviews will also be planned in consultation with the Editorial Board.