{"title":"单层黑磷 DG-JLFET 性能评估","authors":"Pankaj Kumar Sanda","doi":"10.52783/jes.3371","DOIUrl":null,"url":null,"abstract":"Two-dimensional materials are very promising for ultra-short channel future devices. This paper investigates, for the first time, the viability of the junction less transistors based on 2-D materials for future state-of-the-art technology nodes. Specifically, we investigate the performance of a Junction less monolayer black phosphorus (BP) FET (JLFET) with 12nm gate length using ab initio quantum transport simulations. The electrostatic control mechanism of the device and various intrinsic static and dynamic characteristics of the device are studied. The results reveal that BP JLFET performance can fulfill the benchmark requirement of International Roadmap for Devices and Systems (IRDS 2021) for 2028 in terms of HP and HD applications. Therefore, JLFET based on 2D materials can be a promising alternative for nano scale future device applications.","PeriodicalId":44451,"journal":{"name":"Journal of Electrical Systems","volume":null,"pages":null},"PeriodicalIF":0.5000,"publicationDate":"2024-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Performance assessment of monolayer Black Phosphorus DG-JLFET\",\"authors\":\"Pankaj Kumar Sanda\",\"doi\":\"10.52783/jes.3371\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two-dimensional materials are very promising for ultra-short channel future devices. This paper investigates, for the first time, the viability of the junction less transistors based on 2-D materials for future state-of-the-art technology nodes. Specifically, we investigate the performance of a Junction less monolayer black phosphorus (BP) FET (JLFET) with 12nm gate length using ab initio quantum transport simulations. The electrostatic control mechanism of the device and various intrinsic static and dynamic characteristics of the device are studied. The results reveal that BP JLFET performance can fulfill the benchmark requirement of International Roadmap for Devices and Systems (IRDS 2021) for 2028 in terms of HP and HD applications. Therefore, JLFET based on 2D materials can be a promising alternative for nano scale future device applications.\",\"PeriodicalId\":44451,\"journal\":{\"name\":\"Journal of Electrical Systems\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.5000,\"publicationDate\":\"2024-05-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Electrical Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.52783/jes.3371\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Electrical Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.52783/jes.3371","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
二维材料在未来的超短沟道器件中大有可为。本文首次研究了基于二维材料的无结晶体管在未来最先进技术节点上的可行性。具体来说,我们利用 ab initio 量子输运模拟研究了栅极长度为 12nm 的无结单层黑磷 (BP) FET (JLFET) 的性能。研究了器件的静电控制机制以及器件的各种内在静态和动态特性。研究结果表明,BP JLFET 的性能可以满足 2028 年国际器件和系统路线图(IRDS 2021)在惠普和高清应用方面的基准要求。因此,基于二维材料的 JLFET 可以成为未来纳米级器件应用的一个有前途的替代方案。
Performance assessment of monolayer Black Phosphorus DG-JLFET
Two-dimensional materials are very promising for ultra-short channel future devices. This paper investigates, for the first time, the viability of the junction less transistors based on 2-D materials for future state-of-the-art technology nodes. Specifically, we investigate the performance of a Junction less monolayer black phosphorus (BP) FET (JLFET) with 12nm gate length using ab initio quantum transport simulations. The electrostatic control mechanism of the device and various intrinsic static and dynamic characteristics of the device are studied. The results reveal that BP JLFET performance can fulfill the benchmark requirement of International Roadmap for Devices and Systems (IRDS 2021) for 2028 in terms of HP and HD applications. Therefore, JLFET based on 2D materials can be a promising alternative for nano scale future device applications.