{"title":"CFP：无相干处理器设计","authors":"Franklin Yang","doi":"10.1007/s11390-023-3964-5","DOIUrl":null,"url":null,"abstract":"<p>This paper presents the design of a Coherence-Free Processor (CFP) that enables a scalable multiprocessor by eliminating cache coherence operations in both hardware and software. The CFP uses a coherence-free cache (CFC) that can improve the cost-effectiveness and performance-effectiveness of the existing multiprocessors for commonly used workloads. The CFC is feasible because not all program data that reside in a multiprocessor cache need to be accessed by other processors, and private caches at level 1 (L1) and level 2 (L2) facilitate this method of sharing. Reentrant programs are specifically designed to protect their data from modification by other tasks. Program data that are modified but not shared with other tasks do not require a coherence protocol. Adding processors reduces the multitasking queue, reducing elapsed time. Simultaneous execution replaces concurrent execution.</p>","PeriodicalId":50222,"journal":{"name":"Journal of Computer Science and Technology","volume":"11 1","pages":""},"PeriodicalIF":1.2000,"publicationDate":"2024-01-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"CFP: A Coherence-Free Processor Design\",\"authors\":\"Franklin Yang\",\"doi\":\"10.1007/s11390-023-3964-5\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>This paper presents the design of a Coherence-Free Processor (CFP) that enables a scalable multiprocessor by eliminating cache coherence operations in both hardware and software. The CFP uses a coherence-free cache (CFC) that can improve the cost-effectiveness and performance-effectiveness of the existing multiprocessors for commonly used workloads. The CFC is feasible because not all program data that reside in a multiprocessor cache need to be accessed by other processors, and private caches at level 1 (L1) and level 2 (L2) facilitate this method of sharing. Reentrant programs are specifically designed to protect their data from modification by other tasks. Program data that are modified but not shared with other tasks do not require a coherence protocol. Adding processors reduces the multitasking queue, reducing elapsed time. Simultaneous execution replaces concurrent execution.</p>\",\"PeriodicalId\":50222,\"journal\":{\"name\":\"Journal of Computer Science and Technology\",\"volume\":\"11 1\",\"pages\":\"\"},\"PeriodicalIF\":1.2000,\"publicationDate\":\"2024-01-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Computer Science and Technology\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://doi.org/10.1007/s11390-023-3964-5\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Computer Science and Technology","FirstCategoryId":"94","ListUrlMain":"https://doi.org/10.1007/s11390-023-3964-5","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
This paper presents the design of a Coherence-Free Processor (CFP) that enables a scalable multiprocessor by eliminating cache coherence operations in both hardware and software. The CFP uses a coherence-free cache (CFC) that can improve the cost-effectiveness and performance-effectiveness of the existing multiprocessors for commonly used workloads. The CFC is feasible because not all program data that reside in a multiprocessor cache need to be accessed by other processors, and private caches at level 1 (L1) and level 2 (L2) facilitate this method of sharing. Reentrant programs are specifically designed to protect their data from modification by other tasks. Program data that are modified but not shared with other tasks do not require a coherence protocol. Adding processors reduces the multitasking queue, reducing elapsed time. Simultaneous execution replaces concurrent execution.
期刊介绍：
Journal of Computer Science and Technology (JCST), the first English language journal in the computer field published in China, is an international forum for scientists and engineers involved in all aspects of computer science and technology to publish high quality and refereed papers. Papers reporting original research and innovative applications from all parts of the world are welcome. Papers for publication in the journal are selected through rigorous peer review, to ensure originality, timeliness, relevance, and readability. While the journal emphasizes the publication of previously unpublished materials, selected conference papers with exceptional merit that require wider exposure are, at the discretion of the editors, also published, provided they meet the journal''s peer review standards. The journal also seeks clearly written survey and review articles from experts in the field, to promote insightful understanding of the state-of-the-art and technology trends.
Topics covered by Journal of Computer Science and Technology include but are not limited to:
-Computer Architecture and Systems
-Artificial Intelligence and Pattern Recognition
-Computer Networks and Distributed Computing
-Computer Graphics and Multimedia
-Software Systems
-Data Management and Data Mining
-Theory and Algorithms
-Emerging Areas
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