内存处理比特杯应用的软硬件协同仿真方法

Jae-Gun Lee, Shin-Uk Kang, Min-Seong Choo
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摘要

本文为内存处理(PIM)宏设计提出了一种可靠的设计方法。无论是深度神经网络 (DNN),还是卷积神经网络 (CNN),我们都没有把重点放在完全精确的神经网络训练和推理上,而是通过仿真提出了一种高效、精确的性能评估方法,该方法考虑到了实际使用的比特单元的特性。此外,我们还提出了实现高精度所需的硬件设计限制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Hardware and Software Co-Simulation Methodology for Processing-in-Memory Bitcell application
This paper proposes a reliable design methodology for processing-in-memory (PIM) Macro design. Instead of focusing on neural network training and inferencing in full precision, whether deep neural network (DNN) or convolutional neural network (CNN), we present an efficient and accurate performance evaluation methodology through simulation that considers the characteristics of actual bitcells in use. Additionally, we suggest necessary hardware design constraints to achieve high accuracy.
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