柱状结构硅纳米线的大电流场发射

P. Buchner, M. Hausladen, M. Bartl, M. Bachmann, R. Schreiner
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引用次数: 0

摘要

我们研究了几何形状和掺杂水平对硅柱结构上 n 型硅纳米线场发射器性能的影响。因此,我们制作了 50 x 50 柱阵列(直径:5 μm,高度:30 μm,间距:50 μm)的多个阴极,并以二极管配置进行了测量。在第一个实验中,我们比较了使用相同材料的两种几何类型。几何形状 1 是黑硅,这是一种高密度表面,覆盖着单晶硅等离子蚀刻过程中自掩膜产生的紧密间隔的硅针森林。几何图形 2 是硅纳米线,这是单晶硅在等离子体蚀刻过程中形成的冠状形状的单个间隔纳米线。在第二个实验中,我们比较了相同几何形状的两种不同硅掺杂水平[n 型 (P)、1-10 和 <0.005 Ω cm]。掺杂程度较低的硅纳米线样品性能最佳,在 1 kV 的提取电压下可发射 2 mA 电流。性能最佳的几何形状/材料组合被用来组装集成电子源。在三极管配置中对这些电子源进行了测量,其起始电压约为 125 V,在 400 V 的萃取电压下发射电流为 2.5 mA,电子传输率高达 85.0%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High current field emission from Si nanowires on pillar structures
We investigate the influence of the geometry and doping level on the performance of n-type silicon nanowire field emitters on silicon pillar structures. Therefore, multiple cathodes with 50 by 50 pillar arrays (diameter: 5 μm, height: 30 μm, spacing: 50 μm) were fabricated and measured in diode configuration. In the first experiment, we compared two geometry types using the same material. Geometry 1 is black silicon, which is a highly dense surface covering a forest of tightly spaced silicon needles resulting from self-masking during a plasma etching process of single crystal silicon. Geometry 2 are silicon nanowires, which are individual spaced-out nanowires in a crownlike shape resulting from a plasma etching process of single crystal silicon. In the second experiment, we compared two different silicon doping levels [n-type (P), 1–10 and <0.005 Ω cm] for the same geometry. The best performance was achieved with lower doped silicon nanowire samples, emitting 2 mA at an extraction voltage of 1 kV. The geometry/material combination with the best performance was used to assemble an integrated electron source. These electron sources were measured in a triode configuration and reached onset voltages of about 125 V and emission currents of 2.5 mA at extraction voltages of 400 V, while achieving electron transmission rates as high as 85.0%.
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