Ashish Dixit, G. Srivastava, Anil Kumar, S. Shukla
{"title":"基于低功耗 CMOS Gm-C 的前端神经信号处理低通滤波器","authors":"Ashish Dixit, G. Srivastava, Anil Kumar, S. Shukla","doi":"10.11591/ijpeds.v15.i1.pp559-565","DOIUrl":null,"url":null,"abstract":"The sub 100 µV voltage levels and sub 100 Hz frequency range makes the processing of most popular signal electroencephalograph (EEG) for brain functionality analysis, a complex task. The low frequency content of EEG (useful signals below 70 Hz) is commonly used for diagnosis of various brain related disorders making low-pass filter (LPF) a key block in front-end processing as noise reduction and resolution enhancement is crucial for precise recovery of these information. This paper is aimed to design reduced transconductance (Gm) based low power and small area CMOS LPF with cutoff frequency (fc) around 70 Hz. The proposed design is simulated using Cadence virtuoso tool and gives cut-off frequency of 72.958 Hz with low output noise of 3.0609 µV/√Hz and power consumption of 264.060 nW at operating voltage of 0.4 V. The simulation results show linearity of performance over -40 to 100 °C. Layout of circuit takes up area of 86.74×81.21 µm and post layout simulation shows 5% variation in power consumption as compared to pre layout simulations.","PeriodicalId":355274,"journal":{"name":"International Journal of Power Electronics and Drive Systems (IJPEDS)","volume":"115 28","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Low power CMOS Gm-C based low pass filter for front end neural signal processing\",\"authors\":\"Ashish Dixit, G. Srivastava, Anil Kumar, S. Shukla\",\"doi\":\"10.11591/ijpeds.v15.i1.pp559-565\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The sub 100 µV voltage levels and sub 100 Hz frequency range makes the processing of most popular signal electroencephalograph (EEG) for brain functionality analysis, a complex task. The low frequency content of EEG (useful signals below 70 Hz) is commonly used for diagnosis of various brain related disorders making low-pass filter (LPF) a key block in front-end processing as noise reduction and resolution enhancement is crucial for precise recovery of these information. This paper is aimed to design reduced transconductance (Gm) based low power and small area CMOS LPF with cutoff frequency (fc) around 70 Hz. The proposed design is simulated using Cadence virtuoso tool and gives cut-off frequency of 72.958 Hz with low output noise of 3.0609 µV/√Hz and power consumption of 264.060 nW at operating voltage of 0.4 V. The simulation results show linearity of performance over -40 to 100 °C. Layout of circuit takes up area of 86.74×81.21 µm and post layout simulation shows 5% variation in power consumption as compared to pre layout simulations.\",\"PeriodicalId\":355274,\"journal\":{\"name\":\"International Journal of Power Electronics and Drive Systems (IJPEDS)\",\"volume\":\"115 28\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Journal of Power Electronics and Drive Systems (IJPEDS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.11591/ijpeds.v15.i1.pp559-565\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Power Electronics and Drive Systems (IJPEDS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.11591/ijpeds.v15.i1.pp559-565","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low power CMOS Gm-C based low pass filter for front end neural signal processing
The sub 100 µV voltage levels and sub 100 Hz frequency range makes the processing of most popular signal electroencephalograph (EEG) for brain functionality analysis, a complex task. The low frequency content of EEG (useful signals below 70 Hz) is commonly used for diagnosis of various brain related disorders making low-pass filter (LPF) a key block in front-end processing as noise reduction and resolution enhancement is crucial for precise recovery of these information. This paper is aimed to design reduced transconductance (Gm) based low power and small area CMOS LPF with cutoff frequency (fc) around 70 Hz. The proposed design is simulated using Cadence virtuoso tool and gives cut-off frequency of 72.958 Hz with low output noise of 3.0609 µV/√Hz and power consumption of 264.060 nW at operating voltage of 0.4 V. The simulation results show linearity of performance over -40 to 100 °C. Layout of circuit takes up area of 86.74×81.21 µm and post layout simulation shows 5% variation in power consumption as compared to pre layout simulations.