器件性能更强的双阶梯栅垂直双扩散 MOSFET 技术

Devesh Singh Sidar, Onika Parmar, Zeesha Mishra
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引用次数: 0

摘要

本文提出了具有改进器件结构的垂直双扩散 MOSFET(VDMOS)。该器件采用了栅极工程技术,并提出了两种器件,即双阶梯栅极技术(DSGT)和改进型双阶梯栅极技术(m-DSGT)。由于栅极工程的影响,开关能力得到提高,面积比导通电阻降低。器件使用 Silvaco Atlas 软件进行了仿真。当 VGS=0V 时,传统和 m-DSGT 的击穿电压分别为 278.63V 和 280.02V。在 VDS=10V 时,栅极驱动电压为 1V 的条件下,传统和 m-DSGT 器件的电流密度分别为 49.2A/cm2 和 178.5A/cm2。通过二维数值模拟,考察了 DSGT 和 m-DSGT 器件的电气性能。结果表明,与传统 VDMOS 相比,比导通电阻降低了 76.6%,电流密度增加了 4.22 倍,开关速度提高了 26.67%。本文受版权保护。本文受版权保护。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Dual Stepped Gate Vertical Double Diffused MOSFET Technology with Enhanced Device Performance
In this paper, Vertical Double Diffused MOSFET(VDMOS) with improved device structure is proposed. Gate engineering is applied in the proposed device and two devices namely dual stepped gate technology(DSGT) and modified dual stepped gate technology(m‐DSGT) are proposed here. Due to the effect of gate engineering switching ability is improved and area specific ON‐resistance is reduced. Devices are simulated using Silvaco Atlas software. Breakdown voltages for conventional and m‐DSGT are 278.63V and 280.02V, respectively, for VGS=0V. The current density of conventional and m‐DSGT devices is 49.2A/cm2 and 178.5A/cm2 under the conditions on gate drive voltage of 1V for VDS=10V. Using 2‐D numerical simulations, the electrical performance of both DSGT and m‐DSGT devices is examined. The results demonstrate 76.6% decrease in specific ON‐resistance, 4.22 times increase in current density and 26.67% faster switching speed compared to conventional VDMOS. Thus, improving the device performance.This article is protected by copyright. All rights reserved.
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