Design of Ultrasmall Plasmonic Logic Gates Based on Single Nanoring Dielectric-Metal-Dielectric Waveguide

This paper proposes a new configuration of dielectric-metal-dielectric (DMD) waveguides to design optical logic gates. Seven plasmonic logic gates, including NOT, OR, AND, NAND, NOR, XOR, and XNOR, are realized by one nanoring and four DMD plasmonic waveguides. To realize the logic gates, an ultrasmall size of 300 nm × 300 nm device is designed. The performance of the plasmonic logic gates is based on constructive and deconstructive interference between input and control ports. To evaluate the logic state of the output port, the threshold transmission limit is assumed to be 0.35. The transmission ratio, T, contrast ratio, CR, modulation depth, MD, insertion loss, IL, and contrast loss, CL, parameters measure the seven logic gates’ performance. A maximum T of 232% is obtained for AND, OR, and XNOR logic gates. Simulation results show that the dimensional parameters are optimized because of very high MD for all seven logic gates. Maximum values of CR and CL are obtained for the NOT gate. For the AND gate, a minimum IL value is achieved. The studied plasmonic logic gates can be employed in building blocks of all-optical signal-processing nanocircuits and nanophotonics devices. The finite element method (FEM) simulates the structure with COMSOL Multiphysics 5.4 software.