AKGF:在CPU-FPGA上自动生成DNN内核

IF 1.5 4区 计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Dong Dong, Hongxu Jiang, Boyu Diao
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引用次数: 0

摘要

虽然张量加速编译器已被证明在通用硬件上部署深度神经网络(DNN)是有效的,但由于复杂的DNN架构和异构、半开放的计算单元,FPGA的优化仍然具有挑战性。为了在异构CPU-FPGA平台上高效部署深度神经网络,本文介绍了基于CPU-FPGA的深度神经网络自动内核生成(AKGF)框架。AKGF使用TVM的Halide IR生成DNN的中间表示(IR),在IR中标注模型层的运算符,在相应的硬件内核上进行计算,并使用ARM的函数库和多面体模型进一步优化CPU和FPGA的运算符代码,以提高模型推理速度和功耗。在CPU-FPGA板上进行的实验测试验证了AKGF的有效性,与最先进的加速器相比,显示出显著的加速比(高达6.7倍),同时实现了2倍的功率优化。AKGF有效地利用CPU和FPGA的计算能力,在CPU-FPGA平台上实现DNN的高性能部署。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
AKGF: Automatic Kernel Generation for DNN on CPU-FPGA
Abstract While tensor accelerated compilers have proven effective in deploying deep neural networks (DNN) on general-purpose hardware, optimizing for FPGA remains challenging due to the complex DNN architectures and the heterogeneous, semi-open compute units. This paper introduces the Automatic Kernel Generation for DNN on CPU-FPGA (AKGF) framework for efficient deployment of DNN on heterogeneous CPU-FPGA platforms. AKGF generates an intermediate representation (IR) of the DNN using TVM’s Halide IR, annotates the operators of model layers in the IR to compute them on the corresponding hardware cores, and further optimizes the operator code for CPU and FPGA using ARM’s function library and the polyhedral model to enhance model inference speed and power consumption. The experimental tests conducted on a CPU-FPGA board validate the effectiveness of AKGF, demonstrating significant acceleration ratios (up to 6.7x) compared to state-of-the-art accelerators while achieving a 2x power optimization. AKGF effectively leverages the computational capabilities of both CPU and FPGA for high-performance deployment of DNN on CPU-FPGA platforms.
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来源期刊
Computer Journal
Computer Journal 工程技术-计算机:软件工程
CiteScore
3.60
自引率
7.10%
发文量
164
审稿时长
4.8 months
期刊介绍: The Computer Journal is one of the longest-established journals serving all branches of the academic computer science community. It is currently published in four sections.
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