面向可测试性设计的硅编译器专家系统

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI:10.1109/VTEST.1991.208125

R. V. Riessen, H. Kerkhoff, Johan Janssen

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引用次数: 2

摘要

本文描述了一个可测试性设计专家系统，用于为集成电路中的每个宏选择最合适的测试方法。该专家系统与系统设计器的界面是用户友好的，并且具有有效的搜索机制，该专家系统可以用作所有类型宏的框架。该工具将在自测编译器中使用，该编译器将自动生成自测试宏的布局。自测编译器可以作为硅编译系统的一部分，从而有助于将可测试性集成到设计过程中。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A design-for-testability expert system for silicon compilers

This paper describes a design-for-testability expert system for the selection of the most appropriate test method for every macro within an IC. The interface with the system designer is user-friendly and together with an efficient search mechanism this expert system can be used as a framework for all types of macros. This tool will be used in a self-test compiler, which generates the layout of self-testable macros automatically. The self-test compiler can be part of a silicon compilation system and thus contribute to the integration of testability into the design process.<>

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来源期刊

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's

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