180nm CMOS低电压低功率亚阈值运算放大器

2017 Third International Conference on Sensing, Signal Processing and Security (ICSSS) Pub Date : 2017-05-04 DOI:10.1109/SSPS.2017.8071560

C. Yadav, Sunita Prasad

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引用次数: 10

摘要

介绍了一种用于生物医学的两级运算放大器。在运算放大器设计中，所有的晶体管都工作在亚阈值区域，用于低电压低功耗应用。基于TSMC代工180nm工艺设计了该运算放大器，并在Cadence模拟设计环境中进行了仿真。该电路产生40dB增益，114 KHz UGBW, 72°相位裕度，总功耗仅为112nW，电池电压为0.8V。

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Low voltage low power sub-threshold operational amplifier in 180nm CMOS

A two-stage operational amplifier for biomedical applications is presented in this paper. In the Op-Amp design, all transistors have been operated in sub-threshold region for low voltage low power application. The proposed Op-Amp has been designed based on TSMC foundry 180nm process and simulated in Cadence analog design environment. The proposed circuit generates a 40dB gain, 114 KHz UGBW, 72 deg phase margin & total power consumption is just 112nW with 0.8V battery.

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来源期刊

2017 Third International Conference on Sensing, Signal Processing and Security (ICSSS)

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