{"title":"3D NAND通道倾斜/移位位置表征的工作流程解决方案","authors":"M. Najarian","doi":"10.31399/asm.cp.istfa2021p0342","DOIUrl":null,"url":null,"abstract":"\n Manufacturers of the emerging 3D NAND market are working to continually add more memory capacity by increasing the number of layers in the device stacks. As the device stacks get taller, the manufacturers face many challenges for creating the devices with very high aspect ratios (HAR)1 such as those shown in Figure 1. In order to monitor and improve the processes, metrology information is required for 3D analysis of critical dimensions and tilt/shift relative positions of the channels through the device height2.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Workflow Solution for Positional Characterization of 3D NAND Channel Tilt/Shift\",\"authors\":\"M. Najarian\",\"doi\":\"10.31399/asm.cp.istfa2021p0342\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\n Manufacturers of the emerging 3D NAND market are working to continually add more memory capacity by increasing the number of layers in the device stacks. As the device stacks get taller, the manufacturers face many challenges for creating the devices with very high aspect ratios (HAR)1 such as those shown in Figure 1. In order to monitor and improve the processes, metrology information is required for 3D analysis of critical dimensions and tilt/shift relative positions of the channels through the device height2.\",\"PeriodicalId\":188323,\"journal\":{\"name\":\"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.31399/asm.cp.istfa2021p0342\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.31399/asm.cp.istfa2021p0342","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Workflow Solution for Positional Characterization of 3D NAND Channel Tilt/Shift
Manufacturers of the emerging 3D NAND market are working to continually add more memory capacity by increasing the number of layers in the device stacks. As the device stacks get taller, the manufacturers face many challenges for creating the devices with very high aspect ratios (HAR)1 such as those shown in Figure 1. In order to monitor and improve the processes, metrology information is required for 3D analysis of critical dimensions and tilt/shift relative positions of the channels through the device height2.